SLVUCL9A June   2023  – February 2025 TPS65219

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2EEPROM Device Settings
    1. 2.1  Device ID
    2. 2.2  TPS6521907 Sequence and Power Block Diagram
    3. 2.3  Enable Settings
    4. 2.4  Regulator Voltage Settings
    5. 2.5  Sequence Settings
      1. 2.5.1 Power-Up Sequence
      2. 2.5.2 Power-Down Sequence
    6. 2.6  EN / PB / VSENSE Settings
    7. 2.7  Multi-Function Pin Settings
    8. 2.8  Over-Current Deglitch
    9. 2.9  Mask Settings
    10. 2.10 Discharge Check
    11. 2.11 Multi PMIC Config
  6. 3Revision History

2.1 Device ID

This section lists all the register settings that identify the supported temperature and the NVM ID with the corresponding revision that represents a list of default register settings.

Table 2-1 Device ID
Register Address Field Name Value Description
0x00 TI_DEVICE_ID

(Bits: 7-5)

 0x00 Device specific ID code to identify supported ambient and junction temperature.
0x01 TI_NVM_ID

(Bits: 7-0)

 0x07 Identification code for the NVM ID
0x41 NVM_REVISION

(Bits: 7-5)

 0x2 Identification code for the NVM revision
0x26 I2C_ADDRESS

(Bits: 6-0)

 0x30 I2C address