SLVUCY3A October   2024  – December 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line, Load Regulation, and Efficiency
  8. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 EVM Characteristics
      2. 3.1.2 Conversion Efficiency
      3. 3.1.3 Operating Waveforms
        1. 3.1.3.1 Switching
        2. 3.1.3.2 Load Transient Response
        3. 3.1.3.3 Short-Circuit Recovery
        4. 3.1.3.4 Start-Up and Shutdown With EN
        5. 3.1.3.5 Start-Up With VIN
      4. 3.1.4 Bode Plot
      5. 3.1.5 CISPR 25 EMI Performance
      6. 3.1.6 Thermal Performance
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Multi-Layer Stackup
    3. 4.3 Bill of Materials
  10. 5Compliance Information
    1. 5.1 Compliance and Certifications
  11. 6Related Documentation
    1. 6.1 Supplemental Content
      1. 6.1.1 Development Support
      2. 6.1.2 PCB Layout Resources
      3. 6.1.3 Thermal Design Resources
  12. 7Additional Information
    1. 7.1 Trademarks
  13. 8Revision History

1.3 Specification

The following figure shows the schematic of an LM65680-Q1 based synchronous buck converter.

Figure 1-1 LM65680-Q1 Synchronous Buck Regulator Simplified Schematic