SLVUDB8 June   2025 TPS7H1121-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Connector Descriptions
    2. 2.2 Best Practices
  7. 3Implementation Results
    1. 3.1 Soft Start
    2. 3.2 Shutdown
    3. 3.3 Current Limit
    4. 3.4 Frequency Response
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Compliance Information
  10. 6Additional Information
    1. 6.1 Trademarks
  11. 7Related Documentation

Specification

TPS7H1121EVM Simplified SchematicFigure 1-1 Simplified Schematic
TPS7H1121EVM Functional Block DiagramFigure 1-2 Functional Block Diagram
Table 1-1 Default Configuration Options
SPECIFICATIONVALUEDESCRIPTION

Input voltage

VIN

5V

Falls within the recommended device input voltage range of 2.25V to 14V.

Output voltage

VOUT

3.3V

Common power rail voltage within the device output capability. Configurable by changing R4 or R5.

Current limit

CL

3A

Enables the full range of device output current.

Configurable by changing R1.

Soft start time

SS

10ms

A 33nF capacitor on the SS pin provides an 10ms (typ) soft start time.

Configurable by changing C7.

STAB configuration

Not populated

No STAB configuration is needed for stability in the default EVM configuration.

Pads R7, C9, and C10 are provided for adding components to the STAB pin.