SNAU262A December   2020  – January 2021 LMK1C1108

 

  1.   Trademarks
  2. 1Features
  3. 2Signal Path and Control Circuitry
  4. 3Getting Started
  5. 4Power-Supply Connections
  6. 5Enabling and Disabling the Outputs
  7. 6Output Clock
  8. 7Bill of Materials
    1. 7.1 REACH Compliance
  9. 8Schematic
  10. 9Revision History

LMK1C1108 Abstract

GUID-20210120-CA0I-DWND-RNBX-GD4WCRNLZK9P-low.svgFigure 1-1 LMK1C1108EVM

The LMK1C1108 is a high-performance, low additive jitter LVCMOS clock buffer with one LVCMOS input, eight LVCMOS outputs, and a global output enable pin.

This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1C1108. Throughout this document, the acronym EVM and the phrases evaluation module and evaluation board are synonymous with the LMK1C1108EVM.

The LMK1C1108EVM is equipped with 50-Ω SMA connectors and impedance-controlled 50-Ω microstrip transmission lines for best performance.