8-channel output LVCMOS 1.8-V buffer
Product details
Parameters
Package | Pins | Size
Features
- High-performance 1:6 and 1:8 LVCMOS clock buffer
- Very low output skew < 55 ps
- Extremely low additive jitter < 25-fs nominal
- 12-fs typical at VDD = 3.3 V
- 15-fs typical at VDD = 2.5 V
- 28-fs typical at VDD = 1.8 V
- Very low propagation delay < 3 ns
- Synchronous output enable
- Supply voltage: 3.3 V, 2.5 V, or 1.8 V
- 3.3-V tolerant input at all supply voltages
- Industry high ESD rating of 9000 V HBM
- fmax = 250 MHz for 3.3 V fmax = 200-MHz for 2.5 V and 1.8 V
- Operating temperature range: –40 °C to 125 °C
- Available in 14-pin and 16-pin TSSOP package
All trademarks are the property of their respective owners.
Description
The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.
The entire family is designed with a modular approach in mind. Five different fan-out variations, 1:2, 1:3, 1:4, 1:6 and 1:8 are available.
All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low.
The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from – 40 °C to 125 °C.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family datasheet | Dec. 21, 2020 |
User guide | LMK1C1108 Low-Additive, Phase-Noise LVCMOS Clock Buffer Evaluation Board | Dec. 16, 2020 | |
More literature | LMK1C1108EVM EU RoHS Declaration of Comformity (DoC) | Nov. 18, 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Easy to use evaluation board to fan-out up to 8 LVCMOS clocks with low phase noise/jitter
- Output enable pin configurable through jumper
- Board powered from a single 3.3V / 2.5V / 1.8V supply
- Board supports up to eight clock outputs for pin compatible TSSOP devices in the industry standard footprint
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 16 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.