Product details

Function Clock buffer, Level translator, Single-ended Additive RMS jitter (typ) (fs) 19.2 Output frequency (max) (MHz) 250 Number of outputs 8 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 35 Features 1:8 fanout, Synchronous output enable Operating temperature range (°C) -40 to 125 Rating Catalog Output type LVCMOS Input type LVCMOS
Function Clock buffer, Level translator, Single-ended Additive RMS jitter (typ) (fs) 19.2 Output frequency (max) (MHz) 250 Number of outputs 8 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 35 Features 1:8 fanout, Synchronous output enable Operating temperature range (°C) -40 to 125 Rating Catalog Output type LVCMOS Input type LVCMOS
TSSOP (PW) 16 32 mm² 5 x 6.4
  • High-performance 1:6 and 1:8 LVCMOS clock buffer
  • Very low output skew < 55 ps
  • Extremely low additive jitter < 25-fs nominal
    • 12-fs typical at VDD = 3.3 V
    • 15-fs typical at VDD = 2.5 V
    • 28-fs typical at VDD = 1.8 V
  • Very low propagation delay < 3 ns
  • Synchronous output enable
  • Supply voltage: 3.3 V, 2.5 V, or 1.8 V
    • 3.3-V tolerant input at all supply voltages
    • Fail-safe inputs
  • Industry high ESD rating of 9000 V HBM
  • fmax = 250 MHz for 3.3 V fmax = 200-MHz for 2.5 V and 1.8 V
  • Operating temperature range: –40°C to 125°C
  • Available in 14-pin and 16-pin TSSOP package
  • High-performance 1:6 and 1:8 LVCMOS clock buffer
  • Very low output skew < 55 ps
  • Extremely low additive jitter < 25-fs nominal
    • 12-fs typical at VDD = 3.3 V
    • 15-fs typical at VDD = 2.5 V
    • 28-fs typical at VDD = 1.8 V
  • Very low propagation delay < 3 ns
  • Synchronous output enable
  • Supply voltage: 3.3 V, 2.5 V, or 1.8 V
    • 3.3-V tolerant input at all supply voltages
    • Fail-safe inputs
  • Industry high ESD rating of 9000 V HBM
  • fmax = 250 MHz for 3.3 V fmax = 200-MHz for 2.5 V and 1.8 V
  • Operating temperature range: –40°C to 125°C
  • Available in 14-pin and 16-pin TSSOP package

The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Five different fan-out variations, 1:2, 1:3, 1:4, 1:6 and 1:8 are available.

All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.

The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from –40°C to 125°C.

The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Five different fan-out variations, 1:2, 1:3, 1:4, 1:6 and 1:8 are available.

All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.

The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from –40°C to 125°C.

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Technical documentation

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* Data sheet LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family datasheet (Rev. A) PDF | HTML 20 Jan 2022
EVM User's guide LMK1C1108 Low-Additive, Phase-Noise LVCMOS Clock Buffer Evaluation Board (Rev. A) PDF | HTML 20 Jan 2021
Certificate LMK1C1108EVM EU RoHS Declaration of Comformity (DoC) 18 Nov 2020

Design & development

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Evaluation board

LMK1C1108EVM — LMK1C1108 low jitter 1:8 LVCMOS fan-out buffer evaluation module

LMK1C1108 is a high-performance, low additive jitter LVCMOS clock buffer with one LVCMOS input, eight LVCMOS outputs, and a global output enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1C1108. This EVM can also be used to evaluate other (...)
User guide: PDF | HTML
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Simulation model

LMK1C1108 IBIS model

SNAM243.ZIP (45 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TSSOP (PW) 16 View options

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