Design Goals

Design Description

The oscillator circuit generates a square wave at a selected frequency. This is done by charging and discharging the capacitor, C₁ through the resistor, R₁. The oscillation frequency is determined by the RC time constant of R₁ and C₁, and the threshold levels set by the resistor network of R₂, R₃, and R₄. The maximum frequency of the oscillator is limited by the toggle rate of the comparator and the capacitance load at the output. This oscillator circuit is commonly used as a time reference or a supervisor clock source.

Design Notes

1. Comparator toggle rate and output capacitance are critical considerations when designing a high-speed oscillator.
2. Select C₁ to be large enough to minimize the errors caused by stray capacitance.
3. If using a ceramic capacitor, select a COG or NPO type for best stability over temperature.
4. Select lower value resistors for the R₂, R₃, R₄ resistor network to minimize the effects of stray capacitance.
5. R₂, R₃, and R₄ can be adjusted in order to create a duty cycle other than 50%.

Design Steps

1. When R₂ = R₃ = R₄, the resistor network sets the oscillator trip points of the non-inverting input at one-third and two-thirds of the supply.
2. When the output is high, the upper trip point will be set at two-thirds of the supply to bring the output back low.
   ${\text{V}}_{\text{o}}{\text{ = V}}_{\text{s}}\left(\frac{{\text{R}}_{\text{3}}}{{\text{(R}}_{\text{2}}{\text{∥R}}_{\mathrm{4}}{\text{)+R}}_{\text{3}}}\right)\text{ = }\frac{\text{2}}{\text{3}}{\text{V}}_{\text{s}}\text{ = 3.33V}$
3. When the output is low, the lower trip point will be set at one-third of the supply in order to bring the output back high.
   ${\text{V}}_{\text{o}}{\text{ = V}}_{\text{s}}\left(\frac{{\text{R}}_{\mathrm{3}}{\text{∥R}}_{\text{4}}}{{\text{(R}}_{\text{3}}{\text{∥R}}_{\text{4}}{\text{)+R}}_{\text{2}}}\right)\text{ = }\frac{\text{1}}{\text{3}}{\text{V}}_{\text{s}}\text{ = 1.67V}$
4. The timing of the oscillation is controlled by the charging and discharging rate of the capacitor C₁ through the resistor R₁. This capacitor sets the voltage of the inverting input of the comparator. Calculate the time to discharge the capacitor.
   ${\text{V}}_{\text{c}}{\text{ = V}}_{\text{i}}{\text{e}}^{\text{-}\frac{\text{t}}{{\text{R}}_1{\text{C}}_1}}$
   $\frac{\text{1.67}}{\text{3.33}}{\text{ = e}}^{\text{-}\frac{\text{t}}{{\text{R}}_1{\text{C}}_1}}$
   ${\text{t = 0.69R}}_1{\text{C}}_1$
5. Calculate the time to charge the capacitor.
   ${\text{V}}_{\mathrm{i}}{\text{ = V}}_{\text{c}}\left({\text{1-e}}^{\text{-}\frac{\text{t}}{\text{RC}}}\right)$
   $\text{1.67 = 3.33}\left({\text{1-e}}^{\text{-}\frac{\text{t}}{\text{RC}}}\right)$
   $\frac{\text{1.67}}{\text{3.33}}{\text{ = e}}^{\text{-}\frac{\text{t}}{\text{RC}}}$
   ${\text{t = 0.69R}}_1{\text{C}}_1$
6. The time for the capacitor to charge or discharge is given by 0.69R₁C₁. With a target oscillator frequency of 1 MHz, the time to charge or discharge should be 500 ns.
   ${\text{0.69R}}_{\text{1}}{\text{C}}_{\mathrm{1}}\text{ = 500ns}$
   ${\text{R}}_{\text{1}}{\text{C}}_{\text{1}}\text{ = 724ns}$
7. Select C₁ as 100 pF and R₁ as 6.8 kΩ (the closest real world value).

Design Simulations

Transient Simulation Results

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See circuit spice simulation file, SBOMAO3.

For more information on many comparator topics including hysteresis, propagation delay and input common mode range please see, TI Precision Labs.

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Design Alternate Comparator