SNOAA48A December   2019  – November 2024 LM4040-N-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 Functional Safety Failure In Time (FIT) Rates for Voltage Options ≤ 5V
    2. 2.2 Functional Safety Failure In Time (FIT) Rates for 8.192V Voltage Option
    3. 2.3 Functional Safety Failure In Time (FIT) Rates for 10V Voltage Option
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the LM4040-N-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the LM4040-N-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LM4040-N-Q1 data sheet.

LM4040-N-Q1 Pin DiagramFigure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Vdd (min) < Vdd < Vdd max
  • Cathode is connected to supply with a 100Ω resistor to keep the current in the operating range.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
Cathode1The output does not regulate and the cathode pin is held low.B
Anode2No effect to functionality; the device is operating as intended.D
*3No effect to device functionality. Pin 3 must be left floating or connected to pin 2.D
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
Cathode1The device is not powered.B
Anode2The output does not regulate and follows the supply voltage.B
*3No effect to device functionality. Pin 3 must be left floating or connected to pin 2.D
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure EffectsFailure Effect Class
Cathode1AnodeThe output does not regulate and the cathode pin is held low.B
Anode2*No effect to device functionality. Pin 3 must be left floating or connected to pin 2.D
*3CathodeNot a recommended connection; Iq can increase.C
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure EffectsFailure Effect Class
Cathode1No effect to device functionality; the device is operating as intended.D
Anode2The output does not regulate. The cathode pin is held low.B
*3Not a recommended connection; Iq can increaseC