SNOS719H September   1999  – January 2025 LMC7101Q-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics for VS = 2.7V or ±1.35V
    6. 5.6  Electrical Characteristics for VS = 3V or ±1.5V
    7. 5.7  Electrical Characteristics for VS = 5V or ±2.5V
    8. 5.8  Electrical Characteristics for VS = 15V or ±7.5V
    9. 5.9  Typical Characteristics for VS = 2.7V
    10. 5.10 Typical Characteristics for VS = 3V
    11. 5.11 Typical Characteristics for VS = 5V
    12. 5.12 Typical Characteristics for VS = 15V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Benefits of the LMC7101 Tiny Amplifier
        1. 6.3.1.1 Size
        2. 6.3.1.2 Height
        3. 6.3.1.3 Signal Integrity
        4. 6.3.1.4 Simplified Board Layout
        5. 6.3.1.5 Low THD
        6. 6.3.1.6 Low Supply Current
        7. 6.3.1.7 Wide Voltage Range
    4. 6.4 Device Functional Modes
      1. 6.4.1 Input Common-Mode Voltage Range
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Rail-to-Rail Output
      2. 7.1.2 Capacitive Load Tolerance
      3. 7.1.3 Compensating for Input Capacitance When Using Large Value Feedback Resistors
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.12 Typical Characteristics for VS = 15V

at V+ = 15V, V– = 0V, and TA = 25°C (unless otherwise specified)

LMC7101Q-Q1 Open-Loop Frequency Response
 
Figure 5-17 Open-Loop Frequency Response
LMC7101Q-Q1 Sourcing Current vs Output Voltage
 
Figure 5-19 Sourcing Current vs Output Voltage
LMC7101Q-Q1 Input Offset Voltage vs Common-Mode Voltage
5 typical units  
Figure 5-21 Input Offset Voltage vs Common-Mode Voltage
LMC7101Q-Q1 Supply Current vs Supply Voltage
 
Figure 5-23 Supply Current vs Supply Voltage
LMC7101Q-Q1 Input Bias Current vs Common-Mode Voltage
 
Figure 5-25 Input Bias Current vs Common-Mode Voltage
LMC7101Q-Q1 Input Voltage Noise vs Frequency
 
Figure 5-27 Input Voltage Noise vs Frequency
LMC7101Q-Q1 Negative PSRR vs Frequency
 
Figure 5-29 Negative PSRR vs Frequency
LMC7101Q-Q1 Open-Loop Frequency Response at –40°C
 
Figure 5-31 Open-Loop Frequency Response at –40°C
LMC7101Q-Q1 Open-Loop Frequency Response at 85°C
 
Figure 5-33 Open-Loop Frequency Response at 85°C
LMC7101Q-Q1 Gain and Phase vs Capacitive Load
 
Figure 5-35 Gain and Phase vs Capacitive Load
LMC7101Q-Q1 Slew Rate vs Temperature
 
Figure 5-37 Slew Rate vs Temperature
LMC7101Q-Q1 Inverting Small-Signal Pulse Response
 
Figure 5-39 Inverting Small-Signal Pulse Response
LMC7101Q-Q1 Inverting Small-Signal Pulse Response
 
Figure 5-41 Inverting Small-Signal Pulse Response
LMC7101Q-Q1 Inverting Large-Signal Pulse Response
 
Figure 5-43 Inverting Large-Signal Pulse Response
LMC7101Q-Q1 Noninverting Small-Signal Pulse Response
 
Figure 5-45 Noninverting Small-Signal Pulse Response
LMC7101Q-Q1 Noninverting Small-Signal Pulse Response
 
Figure 5-47 Noninverting Small-Signal Pulse Response
LMC7101Q-Q1 Noninverting Large-Signal Pulse Response
 
Figure 5-49 Noninverting Large-Signal Pulse Response
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-51 Stability vs Capacitive Load
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-53 Stability vs Capacitive Load
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-55 Stability vs Capacitive Load
LMC7101Q-Q1 Input Voltage vs Output Voltage
 
Figure 5-18 Input Voltage vs Output Voltage
LMC7101Q-Q1 Sinking Current vs Output Voltage
 
Figure 5-20 Sinking Current vs Output Voltage
LMC7101Q-Q1 CMRR vs Input Voltage
 
Figure 5-22 CMRR vs Input Voltage
LMC7101Q-Q1 Input Current vs Temperature
 
Figure 5-24 Input Current vs Temperature
LMC7101Q-Q1 Output Voltage Swing vs Supply Voltage
 
Figure 5-26 Output Voltage Swing vs Supply Voltage
LMC7101Q-Q1 Positive PSRR vs Frequency
 
Figure 5-28 Positive PSRR vs Frequency
LMC7101Q-Q1 CMRR vs Frequency
 
Figure 5-30 CMRR vs Frequency
LMC7101Q-Q1 Open-Loop Frequency Response at 25°C
 
Figure 5-32 Open-Loop Frequency Response at 25°C
LMC7101Q-Q1 Gain and Phase vs Capacitive Load
 
Figure 5-34 Gain and Phase vs Capacitive Load
LMC7101Q-Q1 Output Impedance vs Frequency
 
Figure 5-36 Output Impedance vs Frequency
LMC7101Q-Q1 Slew Rate vs Supply Voltage
 
Figure 5-38 Slew Rate vs Supply Voltage
LMC7101Q-Q1 Inverting Small-Signal Pulse Response
 
Figure 5-40 Inverting Small-Signal Pulse Response
LMC7101Q-Q1 Inverting Large-Signal Pulse Response
 
Figure 5-42 Inverting Large-Signal Pulse Response
LMC7101Q-Q1 Inverting Large-Signal Pulse Response
 
Figure 5-44 Inverting Large-Signal Pulse Response
LMC7101Q-Q1 Noninverting Small-Signal Pulse Response
 
Figure 5-46 Noninverting Small-Signal Pulse Response
LMC7101Q-Q1 Noninverting Large-Signal Pulse Response
 
Figure 5-48 Noninverting Large-Signal Pulse Response
LMC7101Q-Q1 Noninverting Large-Signal Pulse Response
 
Figure 5-50 Noninverting Large-Signal Pulse Response
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-52 Stability vs Capacitive Load
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-54 Stability vs Capacitive Load
LMC7101Q-Q1 Stability vs Capacitive Load
 
Figure 5-56 Stability vs Capacitive Load