SNOU162A November   2018  – June 2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
  6. 2Hardware
    1. 2.1 EVM Connections
      1. 2.1.1 Theory of Operation
      2. 2.1.2 EVM Connections
      3. 2.1.3 EVM Interface
    2. 2.2 Quick Start Guide
      1. 2.2.1 Supply Power to the LDC5072EVM
      2. 2.2.2 Adjust the AGC
      3. 2.2.3 Connect the Inductive Sensor
      4. 2.2.4 Measure the Analog Outputs
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Revision History

2.1.2 EVM Connections

This section describes the connectors on the LDC5072Q1EVM and how to properly connect, set up, and use the LDC5072-Q1.

Table 2-1 Connector Description
ConnectorTypeFunctionality
J1Banana Jack TerminalVCC Supply
J2Banana Jack TerminalGround
J34 pin 100mil terminal blockProvides connections to ADC for OUT1N, OUT1P, OUT0N, and OUT0P.
J46 position FPC female connectorProvides connections to sensor for LCIN, LCOUT, IN0P, IN1P, IN0N, and IN1N.
J52 pin 100mil headerProvides connections to IN0P and IN0N.
J62 pin 100mil headerProvides connections to LCIN and LCOUT.
J72 pin 100mil headerProvides connections to IN1P and IN1N.
J82 pin 100mil headerJumper to connect VCC to VREG. This must only be installed when using 3.3V VCC operation.
J92 pin 100mil headerJumper to connect AGC_EN pin to potentiometer circuit.
R9 - AGC Adjust50k Trim PotProvides adjustable resistance to create a voltage divider between 0V and VREG on the AGC pin.
LDC5072Q1EVM Connector and Feature LocationsFigure 2-2 Connector and Feature Locations