SNVSBF0C September   2019  – November 2025 LMR36520

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 System Characteristics
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power-Good Flag Output
      2. 7.3.2 Enable and Start-Up
      3. 7.3.3 Current Limit and Short Circuit
      4. 7.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto Mode
      2. 7.4.2 Forced PWM Operation
      3. 7.4.3 Dropout
      4. 7.4.4 Minimum Switch On-Time
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design 1: Low Power 24-V, 2-A Buck Converter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Choosing the Switching Frequency
          2. 8.2.1.2.2  Setting the Output Voltage
          3. 8.2.1.2.3  Inductor Selection
          4. 8.2.1.2.4  Output Capacitor Selection
          5. 8.2.1.2.5  Input Capacitor Selection
          6. 8.2.1.2.6  CBOOT
          7. 8.2.1.2.7  VCC
          8. 8.2.1.2.8  CFF Selection
          9. 8.2.1.2.9  External UVLO
          10. 8.2.1.2.10 Maximum Ambient Temperature
        3. 8.2.1.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information

5 Pin Configuration and Functions

LMR36520 8-Pin HSOIC DDA Package (Top View)Figure 5-1 8-Pin HSOIC DDA Package (Top View)
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
PGND 1 G Power and analog ground terminal. Connect to bypass capacitor with short, wide traces. Ground reference for internal references and logic. All electrical parameters are measured with respect to this pin.
VIN 2 P Input supply to regulator. Connect a high-quality bypass capacitor or capacitors directly to this pin and PGND.
EN 3 A Enable input to regulator. High = ON, low = OFF. Can be connected directly to VIN; Do not float.
PG 4 A Open-drain power-good flag output. Connect to suitable voltage supply through a current limiting resistor. High = power OK, low = power bad. Flag pulls low when EN = Low. Can be left open when not used.
FB 5 A Feedback input to regulator. Connect to tap point of feedback voltage divider. Do not float. Do not ground.
VCC 6 P Internal 5-V LDO output. Used as supply to internal control circuits. Do not connect to external loads. Can be used as logic supply for power-good flag. Connect a high-quality 1-µF capacitor from this pin to PGND.
BOOT 7 P Bootstrap supply voltage for internal high-side driver. Connect a high-quality 100-nF capacitor from this pin to the SW pin.
SW 8 P Regulator switch node. Connect to a power inductor.
PAD THERMAL PAD Thermal Major heat dissipation path of the device. A direct thermal connection to a ground plane is required. The PAD is not meant as an electrical interconnect. Electrical characteristics are not specified.
A = Analog, P = Power, G = Ground