SNVSCR9A October   2024  – December 2024 LM61480T-Q1 , LM61495T-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Output Voltage Selection
      2. 7.3.2  Enable EN Pin and Use as VIN UVLO
      3. 7.3.3  SYNC/MODE Uses for Synchronization
      4. 7.3.4  Clock Locking
      5. 7.3.5  Adjustable Switching Frequency
      6. 7.3.6  RESET Output Operation
      7. 7.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 7.3.8  Bootstrap Voltage and VCBOOT-UVLO (CBOOT Pin)
      9. 7.3.9  Adjustable SW Node Slew Rate
      10. 7.3.10 Spread Spectrum
      11. 7.3.11 Soft Start and Recovery From Dropout
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Hiccup
      14. 7.3.14 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 Peak Current Mode Operation
        2. 7.4.3.2 Auto Mode Operation
          1. 7.4.3.2.1 Diode Emulation
        3. 7.4.3.3 FPWM Mode Operation
        4. 7.4.3.4 Minimum On-time (High Input Voltage) Operation
        5. 7.4.3.5 Dropout
        6. 7.4.3.6 Recovery from Dropout
        7. 7.4.3.7 Other Fault Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choosing the Switching Frequency
        2. 8.2.2.2  Setting the Output Voltage
        3. 8.2.2.3  Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  BOOT Capacitor
        7. 8.2.2.7  BOOT Resistor
        8. 8.2.2.8  VCC
        9. 8.2.2.9  CFF and RFF Selection
        10. 8.2.2.10 RSPSP Selection
        11. 8.2.2.11 RT Selection
        12. 8.2.2.12 RMODE Selection
        13. 8.2.2.13 External UVLO
        14. 8.2.2.14 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Ground and Thermal Considerations
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Glossary
    7. 9.7 Electrostatic Discharge Caution
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.5 Electrical Characteristics

Limits apply over the recommended operating junction temperature range of –40°C to +150°C, unless otherwise noted. Minimum and Maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 13.5V. VIN1 shorted to VIN2 = VIN. VOUT is output set point.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VIN PIN)
VIN Minimum operating input voltage Needed to start-up 3.7 V
Once operating 3 V
VIN_OP_H Minimum voltage hysteresis 1 V
IQ Non-switching input current; measured at VIN pin (3) VIN =13.5V, VFB = +5%, VBIAS = 5V 0.662 10 µA
ISD Shutdown quiescent current; measured at VIN pin VEN = 0V, VIN = 13.5V 0.662 7.5 µA
IB Current into BIAS pin (not switching) VIN = 13.5V, VFB = +5%, VBIAS = 5V, Auto mode enabled  18.5 26 µA
ENABLE (EN PIN)
VEN Enable input-threshold voltage - rising VEN rising 1.161 1.263 1.365 V
VEN_HYST Enable threshold hysteresis 0.25 0.5 V
VEN_WAKE Enable wake-up threshold 0.4 V
IEN Enable pin input current VIN = VEN = 13.5V 0.3 50 nA
INTERNAL LDO (VCC PIN)
VCC Internal VCC voltage VIN = 13.5V, VBIAS = 0V 3.4 V
VIN = 13.5V, VBIAS = 3.3V, 20mA 3.2
VCC_UVLO VIN voltage at which Internal VCC undervoltage lockout is released IVCC = 0A 3.7 V
VCC_UVLO_HYST Internal VCC undervoltage lock-out hysteresis Hysteresis below VCC_UVLO 1.2 V
VOLTAGE REFERENCE (FB PIN)
VFB Internal reference voltage accuracy VIN = 3.0V to 36V, FPWM mode 0.99 1 1.01 V
IFB Input current from FB to AGND VFB = 1V 50 nA
CURRENT LIMITS
ISC_8 Short circuit high-side current Limit 8A variant, duty cycle approaches 0% 11.5 13.8 15.6 A
ILS-LIMIT_8 Low-side current limit 8 9.2 10.4 A
IPEAK-MIN_8 Minimum peak inductor current 1.6 A
IL-NEG_8 Negative current limit –6.4 –5.3 –3.9 A
ISC_10 Short circuit high-side current Limit 10A variant, duty cycle approaches 0% 14 17.3 20 A
ILS-LIMIT_10 Low-side current limit 9.8 11.5 12.9 A
IPEAK-MIN_10 Minimum peak inductor current 1.8 A
IL-NEG_10 Negative current limit –6.6 –5.3 –4 A
VHICCUP Hiccup threshold on FB pin 0.36 0.4 0.44 V
POWER GOOD (RESET PIN)
VRESET-OV RESET upper threshold - rising % of FB voltage 110 112 114 %
VRESET-UV RESET lower threshold - falling % of FB voltage 92 94 96.5 %
VRESET_GUARD RESET UV threshold as percentage of steady state output voltage with output voltage and UV threshold, falling, read at the same TJ, and VIN. Falling 97 %
VRESET-HYS-FALLING RESET fallling threshold hysteresis % of FB voltage 0.5 1.3 2.5 %
VRESET-HYS-RISING RESET rising threshold hysteresis % of FB voltage 0.5 1.3 2.5 %
VRESET_VALID Minimum input voltage for proper RESET function Measured when VRESET < 0.4V with 10kΩ pullup to external 5V 1.2 V
VOL RESET Low-level function output voltage 46.0µA pull up to RESET pin, VIN = 1.0V, VEN = 0V 0.4 V
1mA pull up to RESET pin, VIN = 13.5V, VEN = 0V 0.4
2mA pull up to RESET pin, VIN = 13.5V, VEN = 3.3V 0.4
RRESET RESET ON resistance, VEN = 5V, 1mA pullup current 44 125 Ω
RRESET RESET ON resistance, VEN = 0V, 1mA pullup current 18 40 Ω
OSCILLATOR (SYNC/MODE PIN)
VSYNCDL SYNC/MODE input voltage low 0.4 V
VSYNCDH SYNC/MODE input voltage high 1.7 V
VSYNCD_HYST SYNC/MODE input voltage hysteresis 0.185 1 V
RSYNC Internal pulldown resistor to make sure SYNC/MODE does not float 100 kΩ
HIGH SIDE DRIVE (CBOOT PIN)
VCBOOT_UVLO Voltage on CBOOT pin compared to SW which will turnoff high-side switch 1.9 V
MOSFETS
RDS-ON-HS High-side MOSFET on-resistance Load = 1A, CBOOT-SW = 3.2V 21 39 mΩ
RDS-ON-LS Low-side MOSFET on-resistance Load = 1A, CBOOT-SW = 3.2V 13 25 mΩ
THERMAL SHUTDOWN
TSD_R Thermal shutdown tripping threshold 158 168 180
TSD_F Thermal shutdown recovery threshold 150 159