SNVSCU4 October   2025 LM25137

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Related Products
  6. 5 Pin Configuration and Functions
    1. 5.1 Wettable Flanks
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Input Voltage Range (VIN)
      2. 7.3.2  Bias Supply Regulator (VCC, BIAS1/VOUT1, VDDA)
      3. 7.3.3  Precision Enable (EN1, EN2)
      4. 7.3.4  Switching Frequency (RT)
      5. 7.3.5  Pulse Frequency Modulation and Synchronization (PFM/SYNC)
      6. 7.3.6  Synchronization Out (SYNCOUT)
      7. 7.3.7  Dual Random Spread Spectrum (DRSS)
      8. 7.3.8  Configurable Soft Start (RSS)
      9. 7.3.9  Output Voltage Setpoints (FB1, FB2)
      10. 7.3.10 Error Amplifier and PWM Comparator (FB1, FB2, COMP1, COMP2)
        1. 7.3.10.1 Slope Compensation
      11. 7.3.11 Inductor Current Sense (ISNS1+, BIAS1/VOUT1, ISNS2+, VOUT2)
        1. 7.3.11.1 Shunt Current Sensing
        2. 7.3.11.2 Inductor DCR Current Sensing
      12. 7.3.12 Minimum Controllable On-Time
      13. 7.3.13 100% Duty Cycle Capability
      14. 7.3.14 MOSFET Gate Drivers (HO1, HO2, LO1, LO2)
      15. 7.3.15 Output Configurations (CNFG)
        1. 7.3.15.1 Independent Dual-Output Operation
        2. 7.3.15.2 Single-Output Interleaved Operation
        3. 7.3.15.3 Single-Output Multiphase Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Sleep Mode
      2. 7.4.2 PFM Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Power Train Components
        1. 8.1.1.1 Power MOSFETs
        2. 8.1.1.2 Buck Inductor
        3. 8.1.1.3 Output Capacitors
        4. 8.1.1.4 Input Capacitors
        5. 8.1.1.5 EMI Filter
      2. 8.1.2 Error Amplifier and Compensation
    2. 8.2 Typical Applications
      1. 8.2.1 Design 1 – Dual 5V and 3.3V, 20A Buck Regulator for 12V Input Applications
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Custom Design With Excel Quickstart Tool
          3. 8.2.1.2.3 Inductor Calculations
          4. 8.2.1.2.4 Shunt Resistors
          5. 8.2.1.2.5 Ceramic Output Capacitors
          6. 8.2.1.2.6 Ceramic Input Capacitors
          7. 8.2.1.2.7 Feedback Resistors
          8. 8.2.1.2.8 Input Voltage UVLO Resistors
          9. 8.2.1.2.9 Compensation Components
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Design 2 – Two-Phase, Single-Output Synchronous Buck Regulator
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Design 3 – 12V, 25A, 400kHz, Two-Phase Buck Regulator for 24V Input Applications
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Power Stage Layout
        2. 8.4.1.2 Gate Drive Layout
        3. 8.4.1.3 PWM Controller Layout
        4. 8.4.1.4 Thermal Design and Layout
        5. 8.4.1.5 Ground Plane Design
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
        1. 9.2.1.1 Low-EMI Design Resources
        2. 9.2.1.2 Thermal Design Resources
        3. 9.2.1.3 PCB Layout Resources
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2.1.3 Application Curves

LM25137 Efficiency vs IOUT1
5V output, channel 2 disabled
Figure 8-5 Efficiency vs IOUT1
LM25137 Efficiency vs IOUT
Channels 1 and 2 loaded equally, IOUT1 = IOUT2
Figure 8-7 Efficiency vs IOUT
LM25137 Ch1 and Ch2 Start-Up Characteristic
VIN stepped to 12V 5A resistive loads
Figure 8-9 Ch1 and Ch2 Start-Up Characteristic
LM25137 Load Transient, 5V Output, 0A to 20A
VIN = 12V FPWM
Figure 8-11 Load Transient, 5V Output, 0A to 20A
LM25137 Load Transient, 3.3V Output, 0A to 20A
VIN = 12V FPWM
Figure 8-13 Load Transient, 3.3V Output, 0A to 20A
LM25137 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 10A
VIN = 12V IOUT1 = IOUT2 = 10A
Figure 8-15 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 10A
LM25137 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 15A
VIN = 12V IOUT1 = IOUT2 = 15A
Figure 8-17 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 15A
LM25137 Efficiency vs IOUT2
3.3V output, channel 1 disabled
Figure 8-6 Efficiency vs IOUT2
LM25137 Enable ON and OFF Characteristic
VIN = 12V, VEN1 = VEN2 5A resistive loads
Figure 8-8 Enable ON and OFF Characteristic
LM25137 Ch1 and Ch2 Shutdown Characteristic
VIN decreasing from 12V 5A resistive loads
Figure 8-10 Ch1 and Ch2 Shutdown Characteristic
LM25137 Load Transient, 5V Output, 0A to 10A
VIN = 12V FPWM
Figure 8-12 Load Transient, 5V Output, 0A to 10A
LM25137 Load Transient, 3.3V Output, 0A to 10A
VIN = 12V FPWM
Figure 8-14 Load Transient, 3.3V Output, 0A to 10A
LM25137 CISPR 25 Class 5 EMI Performance, 5V Output at 10A, Ch2 Disabled
VIN = 12V VEN2 = 0V IOUT1 = 10A
Figure 8-16 CISPR 25 Class 5 EMI Performance, 5V Output at 10A, Ch2 Disabled
LM25137 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 15A, DRSS (10%) Enabled
VIN = 12V RCNFG = 29.4kΩ IOUT1 = IOUT2 = 15A
Figure 8-18 CISPR 25 Class 5 EMI Performance, Both Outputs Loaded at 15A, DRSS (10%) Enabled