SNVSCU7 July 2025 LM65460-Q1
ADVMIX
The LM654x0-Q1 is capable of dual-phase operation for high-current applications. The dual phase operation can be configured for FPWM or PFM mode or operation by simply configuring the primary device MODE pin as described in the MODE/SYNC section of the data sheet. For dual phase designs, simply connect RT and the COMP pins as shown in the typical application circuits below. The primary device is recognized by tying a resistor to ground on the RT pin where as the secondary device RT is either pulled up to VCC or down to ground. During start-up, the primary device sends a clock signal 180 degrees out of phase to the secondary device. To enable low-IQ operation in dual-phase configuration, both devices can be programmed in PFM mode. The COMP pin is the error signal of the internal transconductance amplifier. Connect the COMP pin of the primary to the COMP pin of the secondary to make sure of a balanced current sharing between the phases. For fixed VOUT options tie FB, BIAS of the primary and secondary as shown below. For adjustable configurations, tie the FB, BIAS signals as shown. Unlike single phase applications, in dual phase configurations, the RT pins have to be configured on the primary and secondary devices as shown in the table. At start-up, the device senses the RT pin and configures to a primary or secondary and enables external compensation mode to externally compensate the loop with an RC.
| DEVICE | RT | FSW |
|---|---|---|
| Primary | 33kΩ to GND | 2100kHz |
| Primary | 100kΩ to GND | 400kHz |
| Secondary | GND | 2100kHz |
| Secondary | VCC | 400kHz |