SNVU820 February   2022 LM5149-Q1

 

  1.   Trademarks
  2. 1High Density EVM Description
    1. 1.1 Typical Applications
    2. 1.2 Features and Electrical Performance
  3. 2EVM Characteristics
  4. 3Application Circuit Diagram
  5. 4EVM Photo
  6. 5Test Setup and Procedure
    1. 5.1 EVM Connections
    2. 5.2 Test Equipment
    3. 5.3 Recommended Test Setup
      1. 5.3.1 Input Connections
      2. 5.3.2 Output Connections
    4. 5.4 Test Procedure
      1. 5.4.1 Line and Load Regulation, Efficiency
  7. 6Test Data and Performance Curves
    1. 6.1 Conversion Efficiency
    2. 6.2 Operating Waveforms
      1. 6.2.1 Switching
      2. 6.2.2 Load Transient Response
      3. 6.2.3 Line Transient Response
      4. 6.2.4 Start-Up and Shutdown With EN
      5. 6.2.5 Start-Up and Shutdown with VIN
    3. 6.3 Bode Plot
    4. 6.4 CISPR 25 EMI Performance
    5. 6.5 Thermal Performance
  8. 7EVM Documentation
    1. 7.1 Schematic
    2. 7.2 List of Materials
    3. 7.3 PCB Layout
    4. 7.4 Component Drawings
  9. 8Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
        1. 8.2.1.1 PCB Layout Resources
        2. 8.2.1.2 Thermal Design Resources

EVM Connections

Referencing the EVM connections described in Table 5-1, the recommended test setup to evaluate the LM5149-Q1EVM-400 is shown in Figure 5-1. Working at an ESD-protected workstation, make sure that any wrist straps, boot straps, or mats are connected and referencing the user to earth ground before handling the EVM.

Figure 5-1 EVM Test Setup

CAUTION:

Refer to the LM5149-Q1 data sheet, LM5149-Q1 Quickstart Calculator, and WEBENCH® Power Designer for additional guidance pertaining to component selection and controller operation.

Table 5-1 EVM Power Connections
LABELDESCRIPTION
VIN+Positive input voltage power and sense connection
VIN–Negative input voltage power and sense connection
VOUT+Positive output voltage power and sense connection
VOUT–Negative output voltage power and sense connection
Table 5-2 EVM Signal Connections
LABELDESCRIPTION
GNDGND connection
CNFGConfiguration input - tie to GND to disable AEF
COMPError amplifier output
FBFB node
VDDABias supply connection for the analog circuits
PFMPFM/FPWM selection and Synchronization input
GNDGND connection
VCCX Optional external VCC bias supply for higher efficiency
BODE50-Ω injection point for loop response
VOUTOutput voltage
ENENABLE input – tie to GND to disable the device
VCCBias supply connection for the gate drivers and AEF
PGOODPower Good indicator