SNVU917 September   2024 LM706A0-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  8. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 EVM Characteristics
      2. 3.1.2 Conversion Efficiency
      3. 3.1.3 Operating Waveforms
        1. 3.1.3.1 Switching
        2. 3.1.3.2 Load Transient Response
        3. 3.1.3.3 Short-Circuit Recovery
        4. 3.1.3.4 Start-Up and Shutdown With EN
        5. 3.1.3.5 Start-Up With VIN
      4. 3.1.4 Bode Plot
      5. 3.1.5 CISPR 25 EMI Performance
      6. 3.1.6 Thermal Performance
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Multi-Layer Stackup
    3. 4.3 Bill of Materials
  10. 5Compliance Information
    1. 5.1 Compliance and Certifications
  11. 6Related Documentation
    1. 6.1 Supplemental Content
      1. 6.1.1 Development Support
      2. 6.1.2 PCB Layout Resources
      3. 6.1.3 Thermal Design Resources
  12. 7Additional Information
    1. 7.1 Trademarks

2.1.1 EVM Connections

Referencing the EVM connections described in Table 2-1, the recommended test setup to evaluate the LM706A0-Q1 is shown in Figure 2-1. Working at an ESD-protected workstation, make sure that any wrist straps, boot straps, or mats are connected and referencing the user to earth ground before handling the EVM.

Figure 2-1 EVM Test Setup
Note:

Refer to the LM706A0-Q1 65V, 10A, Automotive, High-Efficiency Buck Converter Optimized for High Power Density data sheet, LM706A0-Q1 Quickstart Calculator, and WEBENCH® Power Designer for additional guidance pertaining to component selection and converter operation.

Table 2-1 EVM Power Connections
LABELDESCRIPTION
VIN_EMI+Positive input voltage power and sense connection with EMI filter
VIN_EMI–Positive input voltage power and sense connection with EMI filter
VIN+Positive input voltage power and sense connection bypassing EMI filter
VIN–Negative input voltage power and sense connection bypassing EMI filter
VOUT+Positive output voltage power and sense connection
VOUT–Negative output voltage power and sense connection
Table 2-2 EVM Signal Connections
LABEL DESCRIPTION
VOUT Output voltage
BIAS Optional external bias supply for higher efficiency
PG Power-Good indicator
VCC Internally generated bias supply connection for the gate drivers
EN ENABLE input – tie to GND to disable the device
GND GND connection
VOUT Output voltage
BODE 50Ω injection point for loop response
FB FB node
GND GND connection
PFM PFM / FPWM selection and synchronization input
VDDA Bias supply connection for the analog circuits
COMP Error amplifier output