SPMU383 April 2026 BQ27Z846
The device can generate an interrupt to the host processor on the BTP pin when a Battery Trip Point (BTP) threshold crossing is detected. The IO Config[BTP_EN] bit enables assertion of the BTP pin when a BTP threshold is crossed. The IO Config[BTP_MODE] bit selects whether the threshold is compared against remaining capacity in mAh (IO Config[BTP_MODE] = 0) or relative state of charge in % (IO Config[BTP_MODE] = 1). The active-high or active-low polarity of the BTP pin is configured separately in the BTP GPIO data flash parameters.
The BTP discharge and charge thresholds (BTPDsgSet and BTPChgSet) are RAM-only registers. They are initialized at power-up from the data flash parameters Init Discharge Set and Init Charge Set (or their RSOC-based equivalents when IO Config[BTP_MODE] = 1). The interrupt is cleared when the host re-writes BTPDsgSet or BTPChgSet. For full BTP interrupt behavior, see the BTP chapter.