SPRUJ60 April   2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between F280013x/15x and F28P55x
    1. 1.1 F280013x/15x and F28P55x Feature Comparison
  5. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 80-Pin PN/PNA, 64-Pin PM Packages
    2. 2.2 80-Pin PNA, 64-Pin PM Migration Between F280013x/15x and F28P55x For New and Existing PCB
  6. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28P55x
      1. 3.1.1 Advance Encryption Standard (AES)
      2. 3.1.2 Universal Serial Bus (USB)
      3. 3.1.3 Configurable Logic Block (CLB)
      4. 3.1.4 Live Firmware Update (LFU)
      5. 3.1.5 Programmable Gain Amplifier (PGA)
      6. 3.1.6 ERAD
      7. 3.1.7 FSI
      8. 3.1.8 5V Failsafe IOs
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 PLL
      2. 3.5.2 PIE Channel Mapping
      3. 3.5.3 Bootrom
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 POR/BOR
      3. 3.6.3 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  7. 4Application Code Migration From F280013x/15x to F28P55x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  8. 5Specific Use Cases Related to F28P55x New Features
    1. 5.1 AES
    2. 5.2 PGA
    3. 5.3 USB
  9. 6EABI Support
    1. 6.1 Flash API
  10. 7References

3.7 Memory Module Changes

RAM and FLASH memories in F280013x/15x and F28P55x devices have some similarities and differences. Table 3-10 summarizes the memory features including error-checking and security assignment.

Table 3-10 RAM and FLASH Memory Changes
Memory F280013x/15x F28P55x
Size Parity/
ECC		 Secured Size Parity/
ECC		 Secured
RAM Dedicated(M0,M1) 4KB ECC No 4KB ECC No
Local Shared(LS0) 16KB Parity DCSM-
controlled		 4KB Parity DCSM-
controlled
LS1 16KB Parity DCSM-
controlled		 4KB Parity DCSM-
controlled
LS2-LS7 - - - 24KB Parity DCSM-
controlled
Local Shared(LS8-LS9) - - - 32KB Parity DCSM-
controlled
Global Shared(GS0-GS3) - - - 64KB Parity No
Message -
-		 - - 512B(CPU-CLA)
512B(CLA-DMA)		 Parity No
Total RAM 32KB 133KB
FLASH Per Sector 2KB - - 2KB - -
Per Bank 256KB(1 bank) ECC DCSM-
controlled		 256KB(4 banks)
64KB(1 bank)		 ECC DCSM-
controlled
Total FLASH 256KB(1 banks) 1088KB(5 banks)