SPRUJE8D December   2024  – July 2026

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Preface Read This First
      1. 1.2.1 Important Usage Notes
    3. 1.3 Kit Contents
    4. 1.4 Device Information
      1. 1.4.1 Security
    5. 1.5 Audio Expansion Connectors
  6. 2Hardware
    1. 2.1  Component Identification
    2. 2.2  Power Requirements
      1. 2.2.1 Power Input Using USB Type-C Connector
      2. 2.2.2 Power Status LEDs
      3. 2.2.3 Power Tree
      4. 2.2.4 Power Sequence
      5. 2.2.5 PMIC
    3. 2.3  Reset
    4. 2.4  Clock
    5. 2.5  Boot Mode Selection
    6. 2.6  Header Information
    7. 2.7  Push Buttons
    8. 2.8  Switches
    9. 2.9  GPIO Mapping
    10. 2.10 Interfaces
      1. 2.10.1  Memory Interface
        1. 2.10.1.1 OSPI
        2. 2.10.1.2 Board ID EEPROM
        3. 2.10.1.3 MMC0 Interface
        4. 2.10.1.4 HYPERRAM
      2. 2.10.2  Ethernet Interface
        1. 2.10.2.1 Ethernet Add-on Connectors
      3. 2.10.3  Audio Interfaces
        1. 2.10.3.1 Audio Clocking
        2. 2.10.3.2 McASP
        3. 2.10.3.3 MLB
      4. 2.10.4  I2C Interface
      5. 2.10.5  SPI
      6. 2.10.6  UART
      7. 2.10.7  MCAN
      8. 2.10.8  JTAG
      9. 2.10.9  USB
      10. 2.10.10 ADC
    11. 2.11 AEC Mapping
      1. 2.11.1 Audio Expansion Connector 1
      2. 2.11.2 Audio Expansion Connector 2
    12. 2.12 Test Points
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 Known Hardware or Software Issues
      1. 4.1.1 Issue 1 - RGMII Boot Failure
    2. 4.2 If You need Assistance
    3. 4.3 Trademarks
    4. 4.4 Rev. E2 Design Changes
  9. 5References
    1. 5.1 Reference Documents
    2. 5.2 Other TI Components Used This Design
  10. 6Revision History

4.1.1 Issue 1 - RGMII Boot Failure

Applicable EVM Revisions: E1, A

Issue Description: RGMII booting fails when the DP83867-EVM-AM Industrial PHY Rev A card is used with the AUDIO-AM275-EVM boards.

Note:

This issue applies only during the RGMII boot process. During application execution, the software accesses the PHY through MDIO and programmatically configures the correct TX clock skew, thereby avoiding the double skew problem. Additionally, this timing issue is specific to 1000Mbps (Gigabit) link speed operation. At lower link speeds (10Mbps and 100Mbps), the RGMII TX clock timing margins are sufficient to tolerate the cumulative double clock skew, and booting succeeds without any hardware modification.

Root Cause: The DP83867-EVM-AM Industrial PHY Rev A card is configured through hardware strapping to apply a TX clock skew of 2ns on the PHY side. However, the AM62D/AM275 MAC interface already adds TX clock skew by default. This results in a cumulative double clock skew on the RGMII TX clock line, causing timing violations and boot failure.

Workaround: To mitigate this issue, The TX clock skew setting on the PHY card strapping must be changed from 2ns to 0ns, as the MAC side already compensates for the TX clock skew internally. Follow the steps below:

  1. Remove any existing resistor populated on R23 of the DP83867-EVM-AM Industrial PHY Rev A card and mount a 10kΩ resistor on R23 of the Industrial PHY card.
  2. Remove any existing resistor populated on R24 of the DP83867-EVM-AM Industrial PHY Rev A card and mount a 2.49kΩ resistor on R24 of the Industrial PHY card.

The following figure illustrates the resistor locations on the Industrial PHY card:

AM2754, AM2754-Q1, AM2752, AM2752-Q1 Industrial PHY CardFigure 4-1 Industrial PHY Card