SPVA061 June   2026

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Pin Configuration and Functions
  6. 3Application Schematics
    1. 3.1 Recommended Component Ratings
  7. 4Layout Guidelines
    1. 4.1  VDD Pin
    2. 4.2  PVDD Pin
    3. 4.3  GREG Pin
    4. 4.4  SW Pin
    5. 4.5  VBAT Pin
    6. 4.6  VBAT_SNS Pin
    7. 4.7  OUT_P and OUT_N Pins
      1. 4.7.1 Optional EMI Filter on Output
    8. 4.8  IOVDD Pin
    9. 4.9  DREG Pin
    10. 4.10 Digital I/O Pins
    11. 4.11 Ground Pins
  8. 5Summary
  9. 6References

2 Pin Configuration and Functions

Package Top Level View Pinout Figure 2-1 Package Top Level View Pinout
Pin Functions
PINType1DESCRIPTION
NAMENO.
AD1B6II2C address pin LSB.
AD2B7II2C address pin LSB+1.
BGNDD3PBoost ground. Connect to PCB GND plane strongly with multiple vias.
D4
D5
DREGA8PDigital core voltage regulator output. Bypass to GND with a capacitor. Do not connect to external load.
FSYNCA4II2S word clock or TDM frame sync for Primary Audio Interface.
GREGF6PHigh-side gate CP regulator output. Do not connect to external load.
GNDA5PDigital ground. Connect to PCB GND plane. Strong connection to ground plane required through multiple vias.
C4
C7
D1
D2
F1
F2
IOVDDA6P1.2V or 1.8V Digital IO supply. Decouple to GND with capacitor.
IRQZB5OOpen drain, active low interrupt pin. Pull up to IOVDD with resistor if optional internal pullup is not used.
OUT_NF7OClass-D negative output.
OUT_PF8OClass-D positive output.
PGNDD6PClass-D Power stage ground. Connect to PCB GND plane strongly through multiple vias.
D7
D8
E6
PVDDF3PIntegrated boost output and Class-D power stage supply.
F4
F5
SBCLKA3II2S/TDM serial bit clock for Primary Audio Interface.
SCLB8II²C Clock Pin. Pull up to IOVDD with a resistor.
SDAA7I/OI²C Data Pin. Pull up to IOVDD with a resistor.
SDINB4II2S or TDM serial data input for Primary Audio Interface.
SDOUTB3OI2S or TDM serial data output for Primary Audio Interface.
SDZC5IActive low hardware shutdown.
SWE1PBoost converter switch input.
E2
E3
E4
E5
VBATC1PBattery power supply input. Connect to 2.5V to 5.5V supply and decouple with a capacitor.
C2
C3
VBAT_SNSC6IBattery sense terminal. Connect to 1S or 2S battery supply for remote battery sensing. Ground the pin if remote sensing is not used.
GNDC6PGround Pin. This pin can also be used as battery sense terminal. Connect to 1S or 2S battery supply for remote battery sensing. Ground the pin if remote sensing is not used.
VDDC8PAnalog, digital power supply. Connect to 1.8V supply and decouple to GND with capacitor.
VSNS_NE7IVoltage sense negative input. Connect to speaker negative terminal as close to speaker as possible. Add series resistor if EMI filter is used.
VSNS_PE8IVoltage sense positive input. Connect to speaker positive terminal as close to speaker as possible. Add series resistor if EMI filter is used.
FSYNC2A1II2S word clock or TDM frame sync for Secondary Audio Interface.
SBCLK2A2II2S/TDM serial bit clock for Secondary Audio Interface.
SDIN2B2II2S or TDM serial data input for Secondary Audio Interface.
SDOUT2B1OI2S or TDM serial data output for Secondary Audio Interface.
  1. I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.