SSDA013 August   2026 MSPM0G5117 , MSPM0G5187

 

  1.   1
  2. 1 Description
  3. 2 Required Peripherals
  4. 3 Compatible Devices
  5. 4 Design Steps
  6. 5 Design Considerations
  7. 6 Software Flowchart
  8. 7 Application Code
  9. 8 Data Flow Examples
  10. 9 Additional Resources
  11. 10Trademarks

4 Design Steps

  1. Set up the TinyUSB module in SysConfig. Add one CDC instance (CDC_0). SysConfig allocates three endpoints automatically: notification IN (EP_IN2), data IN (EP_IN1), and data OUT (EP_OUT1).
  2. Configure the USB clock tree. The two platforms use different clock paths. On MSPM0G5187: enable the PLL and USB FLL, set UDIV to 2, and select HSCLKMUX_SYSPLL0. On MSPM0C5116: enable only the USB FLL (no PLL needed), set UDIV to 2, and select HSCLKMUX_USBFLL.
  3. Set up the UART module in SysConfig.
    1. Set Target Baud Rate to 115200.
    2. Enable the FIFO. Set the RX FIFO threshold to DL_UART_RX_FIFO_LEVEL_ONE_ENTRY (interrupt on every received byte). Set the TX FIFO threshold to DL_UART_TX_FIFO_LEVEL_ONE_ENTRY.
    3. In the Interrupt Configuration tab, enable the RX interrupt and the DMA Done TX interrupt. In the DMA Configuration tab, add a TX DMA channel (DMA_CH0) configured for Block addr. to Fixed addr. mode. And source length is byte
  4. Set up the Timer module in SysConfig.
    1. Add one timer instance (TIMER_0). Select LFCLK as the clock source and enable the ZERO interrupt.
    2. Timeout period is set in the software.
      // ===== UART RX Timeout =====
// Timeout period: (UART_TIMEOUT+1)/32768 ≈ 200us
// Triggers when no new UART byte arrives for 200us
#define UART_TIMEOUT        6
  5. Set up SysTick in SysConfig. Enable SysTick with a period matched to the CPU frequency: 80000 cycles for MSPM0G5187 (80 MHz) or 48000 cycles for MSPM0C5116 (48 MHz). Both values give a 1 ms period. TinyUSB's board_millis() requires this 1 ms period.