SSDA015 September   2026 MSPM0G5117 , MSPM0G5187

 

  1.   1
  2. Description
  3. Required Peripherals
  4. Compatible Devices
  5. Design Steps
  6. Design Considerations
  7. Software Flowchart
  8. Application Code
  9. Data Flow Examples
  10. Additional Resources
  11. 10Trademarks

Description

This subsystem demonstrates how to implement MSPM0 devices as a USB Communications Device Class - Abstract Control Model (USB CDC-ACM) to serial peripheral interface (SPI) bridge. When connected to a USB host, the device enumerates as a virtual COM port. No custom drivers are required on Windows®, macOS®, or Linux®.

The bridge forwards USB host data to the SPI bus as write transactions, and returns SPI slave read data back to the USB host. Because SPI is a full-duplex bus, the bridge sends dummy bytes on MOSI during read transactions to generate the SPI clock and simultaneously receive data on MISO. The SPI slave device signals data availability through a dedicated GPIO pin (data-ready signal), which triggers an SPI read transaction. This example supports two target platforms: the MSPM0G5187 (LaunchPad™, LQFP-64) and the MSPM0C5116 (LaunchPad, LQFP-48). Both platforms run the same bridge application code, with device-specific SysConfig peripheral assignments.

 System Functional Block
          Diagram Figure 1-1 System Functional Block Diagram