Ryan Manack

Many application processors demand fast changes in load current including FPGAs, ASICs and other high-power CPUs. The power supplies for these systems require special attention to control topology selection and output filter design to support fast current steps. Once designed, a key challenge is testing the power supply against the specified current step and slew rate. In this article we illustrate a simple circuit to generate current transitions >300 amps per microsecond (A/us).

It is common to test a power supply’s transient response with an electronic load. For many system rails, such as a server’s 3.3V or 5V bus, an electronic load is easily configurable to sink current in the 2-10A/us range. However, core voltages can require slew rates two orders of magnitude above these levels. A major limiting factor in high-slew rate testing is parasitic inductance in the load path. Equation 1 calculates a maximum inductance of 3nH to slew 15A of current at 300A/us for a 0.9V output. For reference, a 1-inch piece of 16-gauge wire looped through a current probe adds 20nH of inductance into the load path. It is clear that another current sinking method is required.

Most power supply evaluation modules can easily be configured to sink current quickly. Figure 1 illustrates a discrete MOSFET plus sense resistor circuit that can be soldered directly from the output plane to ground. It is important to select a fast-switching, low gate-charge MOSFET and a low-inductance sense resistor capable of handling the load power.

An arbitrary waveform generator with a 50-ohm output is sufficient to drive the MOSFET gate. Use a “Pulse” waveform and keep the duty cycle low to limit the power dissipation in the switch and sense resistor – 10% is reasonable at 1kHz frequency. Tune the gate voltage to operate the FET in its linear region to dial in the current. Use a differential probe, or passive probe, with full bandwidth to sense the voltage across the sense resistor. The current is the measured voltage divided by the sense resistance, and the slew rate is the change in current divided by the change in time, ΔI/Δt. The ΔI/Δt is adjusted by increasing (or decreasing) the rise and fall times of the waveform generator. Figure 2 shows the calibrated voltage (current) waveforms for the transient load.

Testing load transients with high slew rates is achievable through a discrete MOSFET plus sense resistor circuit load. It is important to minimize the inductance in the loop, so these components are soldered directly to the printed circuit board without a current probe. A function generator can then be used to drive the MOSFET and finely tune the load current and rise/fall times. Please feel free to ask questions or provide comments on this approach in the space below.