SWRA846 July 2025 CC2642R-Q1
Based on the analysis of the various pairing anomalies described above, it is evident that the encryption resource competition of CC2642 has become one of the cores of systemic security issues. The hardware encryption module of this chip adopts an exclusive architecture design, which must simultaneously carry out critical tasks such as RPA address resolution, pairing key negotiation, and link data encryption, whereas the application layer can neither monitor its workload status in real time nor implement priority scheduling strategies. Targeting this hardware limitation, this paper proposes a software-based AES encryption collaborative scheme—by building an observable and schedulable software encryption channel, it forms a complementary architecture with the hardware module. This scheme fully utilizes the computing power of the CC2642's Cortex-M4 core to implement the following innovative designs at the application layer: