SWRZ138B July   2023  – December 2025 AWRL1432

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Usage Notes
    1. 4.1 Power up sequence in power optimized topology
    2. 4.2 Meeting data sheet spec for 1.2V Digital LDO output path in BOM optimized topology
  6. 5Advisory to Silicon Variant / Revision Map
  7. 6Known Design Exceptions to Functional Specifications
    1. 6.1  ANA #51
    2. 6.2  ANA #52
    3. 6.3  DIG #1
    4. 6.4  DIG #2
    5. 6.5  DIG #3
    6. 6.6  DIG #4
    7. 6.7  DIG #5
    8. 6.8  DIG #6
    9. 6.9  DIG #7
    10. 6.10 DIG #8
    11. 6.11 DIG #9
    12. 6.12 DIG #10
    13. 6.13 DIG #14
    14. 6.14 DIG #15
    15. 6.15 DIG #16
  8. 7Trademarks
  9.   Revision History

6.12 DIG #10

Incorrect behavior of frame stop API

Revision(s) Affected

AWRL1432 ES1.1, ES2.0

Details

The Frame Timer latches Frame Stop command in hardware registers which takes affect at the end of current frame. Frame Stop API issued when Frame Timer has already stopped will result in un-intended stop in the next frame trigger because of the latched stop bit.

Workaround

  1. Unnecessary Sensor Stop API should be avoided.
  2. The application may have to wait for one complete frame period before getting frame stop.
  3. Application should wait for FECSS to complete Burst End and Frame End activities after receiving the Frame Stop conformation.