TIDUCU8A september   2022  – may 2023

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Framehandler
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Power Supply Inrush Tests (TCM_PHYL_INTF_ISIRM)
      2. 3.3.2 Interface Wake-Up Voltages (TCM_PHYL_INTF_IQWUH and TCM_PHYL_INTF_IQWUHL)
      3. 3.3.3 Current Sink
      4. 3.3.4 Timing Tests
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5Revision History

Block Diagram

The design consists of two major blocks as it is shown in Figure 3-3.

The first block is the AM243x LaunchPad™, containing the processor, two Ethernet ports as well as the necessary power supply circuitry and flash memory.

The second block is the IO-Link BoosterPack. Here all the analog circuit to build an Io-Link port is included. The main components here are the power supply for each port and the IO-Link transceiver.

The power supply is built with a four port high side switch TPS274160, it offers not only switching power, but also includes a configurable current limit and current monitoring. This helps in case of overloaded outputs due to shorts, defective devices or wiring issues to keep the system running and locate the reason for problems. The power input of the system is protected against over voltage and reverse polarity using a TPS2663 eFuse. This also offers a current monitoring output to observe the total current consumption.

Each of the eight IO-Link ports use the TIOL112 as a transceiver. This devices implements the physical layer and has an integrated current sink on the CQ line as required for an IO-Link Master interface. Also it offers a current limit of about 700 mA, to provide enough current during the wake up pulse, and at the same time limit the current so cables and power supplies are not overloaded in case faults. To minimize overshoots during communication and reduce emissions, the slew rate on the CQ line is limited.

For signaling the port status a simple LED driver with serial interface TCA6424 is added to the board. A SN65HVS883 implements eight digital inputs, one on each of the IO-Link ports.

GUID-20220324-SS0I-3CHB-BWQM-FXVWW4TCJSLZ-low.svgFigure 2-1 TIDA-010234 Block Diagram