TIDUF05 August   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 PCB and Form Factor
      2. 2.2.2 Power Supply Design
        1. 2.2.2.1 POC Filter
        2. 2.2.2.2 Power Supply Considerations
          1. 2.2.2.2.1 Choosing External Components
          2. 2.2.2.2.2 Choosing the Buck 1 Inductor
          3. 2.2.2.2.3 Choosing the Buck 2 and Buck 3 Inductors
        3. 2.2.2.3 Functional Safety
    3. 2.3 Highlighted Products
      1. 2.3.1 AR0820 Imager
      2. 2.3.2 DS90UB953-Q1
      3. 2.3.3 TPS650330-Q1
    4. 2.4 System Design Theory
  8. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Hardware Setup
      2. 3.1.2 FPD-Link III I2C Initialization
      3. 3.1.3 AR0820 Initialization
    2. 3.2 Test Setup
      1. 3.2.1 Power Supplies Start Up
      2. 3.2.2 Camera Functionality
    3. 3.3 Test Results
      1. 3.3.1 Power Supplies Start-Up
      2. 3.3.2 Power Supply Start-Up—1.8-V Rail and PDB
      3. 3.3.3 Power Supply Voltage Ripple
      4. 3.3.4 Power Supply Load Currents
      5. 3.3.5 Video Output
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 Bill of Materials
      3. 4.1.3 PCB Layout Recommendations
        1. 4.1.3.1 Layout Prints
        2. 4.1.3.2 PMIC Layout Recommendations
        3. 4.1.3.3 Serializer Layout Recommendations
        4. 4.1.3.4 Imager Layout Recommendations
        5. 4.1.3.5 PCB Layer Stackup Recommendations
      4. 4.1.4 Altium Project
      5. 4.1.5 Gerber Files
  10. 5Documentation Support
  11. 6Support Resources
  12. 7Trademarks
2.2.2.2.1 Choosing External Components

For simplicity, the efficiency of the buck regulators is assumed to be 85% for these operating conditions, and the efficiency of the LDO is given by Equation 3.

Equation 2. η LDO = V OUT V IN

System and Buck 1 currents calculated assuming 85% switching regulator efficiency are given in Equation 3.

Table 2-2 shows the load capability of each regulator compared to the requirements of the camera module. The TPS650330-Q1 device is capable of supplying the system power with plenty of margin to account for variations between typical and maximum current variation.

Table 2-2 Regulator Load Capability
REGULATOROUTPUT VOLTAGE (V)MAX CURRENT (mA)REQUIRED CURRENT (mA)
Buck 13.31500383
Buck 21.81200232
Buck 31.21200217
LDO2.8300141

After determining that the TPS650330-Q1 device is suitable based on the power requirements, the external components can be chosen quickly based on the data sheet recommendations, simplifying the design process. These recommendations are shown in Figure 2-5 and Table 2-3.

GUID-8E14830E-7EC9-47EB-A863-5FB79B06EB98-low.gif Figure 2-5 TPS650330-Q1 Typical Application Circuit
Table 2-3 TPS650330-Q1 Recommended Components
COMPONENT DESCRIPTION VALUE UNIT
CVSYS,VSYS_S VSYS and VSYS_S decoupling 10 µF
CPVIN_B1 Buck 1 input capacitor 10 µF
LSW_B1 Buck 1 inductor

1.5

 µH
COUT_B1 Buck 1 output capacitor 10 µF
CPVIN_B2 Buck 2 input capacitor 10 µF
LSW_B2 Buck 2 inductor 1.0 µH
COUT_B2 Buck 2 output capacitor 10 µF
CPVIN_B3 Buck 3 input capacitor 10 µF
LSW_B3 Buck 3 inductor 1.0 µH
COUT_B3 Buck 3 output capacitor 10 µF
CPVIN_LDO LDO input capacitor 1.0 µF
COUT_LDO LDO output capacitor 2.2 µF