SBOA327A December   2019  – August 2021

Design Goals

InputOutputSupply
ViMinViMaxIoMinIoMaxVccVee
0V2V0mA100mA5V0V

Design Description

This single-supply, low-side, V-I converter delivers a well-regulated current to a load which can be connected to a voltage greater than the op-amp supply voltage. The circuit accepts an input voltage between 0V and 2V and converts it to a current between 0mA and 100mA. The current is accurately regulated by feeding back the voltage drop across a low-side current-sense resistor, R3, to the inverting input of the op amp.

Design Notes

1. A device with a rail-to-rail input (RRI) or common-mode voltage that extends to GND is required.
2. R1 helps isolate the amplifier from the capacitive load of the MOSFET gate.
3. Feedback components R2 and C1 provide compensation to ensure stability during input or load transients, which also helps reduce noise. R2 provides a DC feedback path directly at the current setting resistor (R3) and C1 provides a high-frequency feedback path that bypasses the MOSFET.
4. The input bias current will flow through R2, which will cause a DC error. Therefore, ensure that this error is minimal compared to the offset voltage of the op amp.
5. Use the op amp in a linear operating region. Linear output swing is usually specified under the AOL test conditions provided in the op amp data sheet.

Design Steps

1. Determine the transfer function.
2. Calculate the sense resistor, R3.
${\text{R}}_{\text{3}}\text{=}\frac{{\text{V}}_{\text{iMax}}{\text{- V}}_{\mathrm{iMin}}}{{I}_{\text{oMax}}{\text{- I}}_{\text{oMin}}}\text{=}\frac{\text{2V - 0V}}{\text{100mA - 0mA}}\text{= 20Ω}$
3. Calculate the maximum power dissipated into the sense resistor, R3, to ensure the resistor power ratings are not exceeded.
${\text{P}}_{{\text{R}}_{\text{3}}}=\frac{{{\text{V}}_{\text{iMax}}}^{2}}{{\text{R}}_{3}}\text{=}\frac{{\text{2V}}^{2}}{\text{20Ω}}\text{= 0.2W}$
4. See the Design References section, [2] for the design procedure on how to properly size the compensation components, R1, R2, and C1.

Design Simulations

DC Simulation Results

Loop Stability Simulation Results

Step Response

Compliance Voltage

Set output to full-scale (100 mA) and test the maximum load resistance.

Design References

1. See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
2. TI Precision Labs

Design Featured Op Amp

TLV9062
Vss1.8 V to 5.5 V
VinCMRail-to-rail
Vout(Vcc + 60mV) to (Vee – 60mV) at RL = 2kΩ
Vos1.6mV
Iq0.538mA
Ib0.5pA
UGBW10MHz
SR6.5V/µs
#Channels1, 2, 4
www.ti.com/product/TLV9062

Design Alternate Op Amp

TLV9042

OPA2182

Vss 1.2V to 5.5V

4.5V to 36V

VinCM Rail-to-rail

(Vee – 0.1V) to (Vcc – 2.5V)

Vout Rail-to-rail

Rail-to-rail

Vos ±0.6mV

±0.45μV

Iq

0.01mA

0.85mA

Ib ±1pA

±50pA

UGBW 350kHz

5MHz

SR 0.2V/µs

10V/μS

#Channels

1,2,4

2

www.ti.com/product/TLV9042

www.ti.com/product/OPA2182