SBOA538 February   2022 BUF802


  1. 1Application Brief

Application Brief

Wide-bandwidth data-acquisition systems (for example, oscilloscopes and active probes) use an analog front-end (AFE) signal chain to capture high-frequency signals and fast-transient pulses. The key characteristics of a wide-band DAQ AFE include:

  • Wide -3 dB bandwidth to measure a wide-frequency range of signals
  • High-input impedance mode to prevent loading of the measured signals
  • Low-noise to detect low-magnitude signals
  • Superior distortion performance to maintain signal fidelity

When looking across the industry today one can find a wide variety of amplifiers and buffers which support bandwidths greater than 1 GHz, however, these bandwidths refer to the small-signal bandwidth ( < 100 mVPP) and are not suitable to be used in an AFE, designed for large signals (> 1 VPP) in magnitude.

The BUF802 device is an open-loop, unity-gain buffer with a JFET-input stage that offers low-noise, high-impedance buffering for data acquisition system (DAQ) front-ends. The BUF802 supports DC to 3.1 GHz of bandwidth for a 1 VPP signal while offering excellent distortion and noise performance across the frequency range. The BUF802 can be used in a composite loop circuit with a precision amplifier as shown in Figure 1-1 for applications where wide-bandwidth and high-precision is desired.

Figure 1-1 Generic Composite Loop Front-End Stage with OPA140 and BUF802

This article explains tuning of the S-parameters, to achieve a flat frequency response and impedance matching for your front-end design.

Composite Loop Circuits

A composite loop circuit interleaves two different and often complementary sub-circuits to create a single seamless circuit block whose resulting performance is a combination of each sub-circuits benefits. The composite loop in Figure 1-2 splits the input signal into low frequency and high frequency components, taking each signal component to the output through two different circuits (transfer functions) and recombines them to reproduce a net output signal. The Low-frequency path gives the net transfer function good DC precision and the BUF802 (High-frequency path) allows the net transfer function to achieve a wide-bandwidth. One of the challenges of the circuit in Figure 1-2 is to smoothly interleave the two paths to achieve wide-bandwidth as well as good DC precision. Any mismatch in the transfer functions of the two paths will lead to a discontinuity in the net transfer function frequency response resulting in a loss of signal fidelity. The BUF802 uses an innovative architecture to simplify the design challenges discussed previously of interleaving the two signal paths.

Figure 1-2 Composite Loop Low- and High-frequency Paths

S-Parameters Fundamentals

Scattering parameters or S-parameters provide a framework for describing networks based on the ratio of input transmission signals and reflected signals as shown in Figure 1-3. S11 represents ratio of the power reflected from port 1 (b1/a1, while a2=0). S21 represents ratio of the power transferred from port 1 to port 2 (b2/a1, while a2=0). For a unidirectional device such as a buffer (with port 1 as the input and port 2 as the output), S11 is the input port voltage reflection coefficient describing the level of input-impedance matching while S21 is the forward voltage gain and describes the frequency response.

Figure 1-3 Two-Port Network Wave Quantities

S-parameters are usually represented as a function of frequency. For a detailed analysis of S-parameters check out the blog So, What are S-Parameters Anyway?

Tuning Circuit for the S21

To achieve the desired S21 across the frequency range the following conditions need to be met:

  • Reduction of Peaking and Achieving Wide-Bandwidth
  • Achieving Smooth Transition Between Low- to High-frequency

Reduction of Peaking and Achieving Wide-Bandwidth

Figure 1-4 shows a composite loop circuit with input parasitics caused by the PCB and the DUT (BUF802). The parasitic inductance of the PCB trace (LS) can interact with the input capacitance of the BUF802 (CIN) to create a resonant LC circuit resulting in a peaked frequency response as shown in Figure 1-5. To reduce LS, minimize the trace length from the input port to the BUF802s input. Figure 1-5 demonstrates the effect of a long trace on S21.

Figure 1-4 Input Parasitic Network
Figure 1-5 Peaking in S21 due to LS and CIN Resonance

The peaking due to the resonance between LS and CIN can be dampened by the insertion of a series dampening resistor RS as shown in Figure 1-4. Besides helping in dampening S21 peaking, RS also helps with improvement of S11. The exact math behind improvement of S11 is discussed in Tuning of the S11 Parameter.

The series input capacitor CHF forms a voltage divider with CIN reducing the gain of High-frequency path. It is therefore important to make CHF >> CIN to ensure the voltage divider does not attenuate the incoming AC signals.

The BUF802 can achieve a -3 dB bandwidth of 3.1-GHz for 1 VPP signals. The addition of RS to reduce S21 peaking also reduces the bandwidth due to the addition of the RC pole caused by RS and CIN. This effect is seen in Figure 1-6.

Figure 1-6 S21 Input Response with Varying RS

Table 1-1 summarizes the previous points.

Table 1-1 Impact of RS Value on the AFE
Increasing RS Decreasing RS
Protects BUF802 against transients Increases bandwidth
Reduces peaking of S21 Improves S11 at lower frequency
Improves S11 at higher frequencies Reduces output noise

Achieving a Smooth Transition Between the Low- and High-Frequency Regions

The BUF802 can be used as a standalone buffer, Buffer Mode (BF Mode), or in a composite loop with a precision amplifier. Composite Loop Mode (CL Mode), helps to achieve both DC precision and wide, large-signal bandwidth. Operating the BUF802 in CL Mode with a precision amplifier requires the S21 responses (Gain) of the two different sub-circuits to be matched to maintain a smooth transition between the low-frequency and high-frequency response. A smooth transition can be achieved by adhering to the following two conditions:

  1. α/β = G ( where α = Rα2 / (Rα2+ Rα1) , 1 /β = 1+ (Rβ2/ RPOT) as shown in Figure 1-7 and G = DC Gain of BUF802)
  2. High-frequency response pole (fHF)<< low-frequency pole (fLF)
Figure 1-7 α and β Resistor Network

For the first condition the low-frequency region is determined solely by the precision circuit. The incoming signal is divided down in amplitude by the ratio α and is further gained up by 1/β, by the precision amplifier. Therefore, in the low-frequency region:

Equation 1. S21 (at low-frequency) = α * 1/β

The Gain (G) can be found in the BUF802 data sheet and is typically 0.96 V/V.

Equation 2. S21 (at high-frequency) = G

To maintain a constant S21 across frequency make G = α/β by adjusting the value of RPOT.

The high-frequency pole of the BUF802 (fHF) path is created by CHF and RHF as is shown in Equation 3. The low-frequency pole (fLF) of the precision amplifier path is a function of the Gain Bandwidth Product (GBW) of the precision amplifier, the auxiliary path gain (GAUX) and the parasitic input capacitance of the BUF802 and is shown in Equation 4.

Equation 3. fHF = 1/ (2 × π × RHF × CHF)
Equation 4. fLF = GBW (precision amplifier) × GAUX × β

The composite loop transition region should be designed so that the high-frequency pole (fHF) falls at a much lower frequency than the low-frequency pole (fLF). This ensures a sufficient overlap in the crossover frequency region and simplifies the complex transfer function into simple poles and zeros.

In addition to the two conditions mentioned previously CF (compensation capacitor) needs to be tuned to ensure sufficient compensation of the precision amplifier. The CF value is calculated using the formula in Equation 5.

Equation 5. CF= CINPA *(g Rα1/Rβ2-1)

where CINPA is the common mode input capacitance of the precision amplifier.

Figure 1-8 shows the effect of CF tuning for its three different values.

Figure 1-8 Tuning Output Response with Different CF Value

Refer to section in the BUF802 data sheet for the design procedure of a 1-GHz AFE using the previous equations.

Tuning Circuit for the Desired S11

Impedance matching is important to reduce reflections and preserve signal integrity. An S11 better than -15 dB across the frequency of interest is considered an acceptable target spec. While a 50-Ω termination helps achieve the desired S11, it is important to have a high input impedance option to measure a signal without loading the previous driving stage. Hence, data acquisition systems can have a selectable 50- Ω input and 1-MΩ input termination option. The JFET-input stage of the BUF802 offers G-Ω’s of input impedance and can therefore be terminated with an external 1 MΩ resistor without affecting performance. If a 50 Ω termination is required it can be switched in via a relay as shown in Figure 1-9. The BUF802 therefore has the flexibility to be used in both 1-MΩ and 50-Ω terminated systems.

Figure 1-9 BUF802 with Optional
1 MΩ / 50 Ω Termination
Figure 1-10 Effective Input Impedance
with RS and LN

While it is possible to mount an exact 50-Ω termination to achieve the resistance at the input of the front-end composite loop circuit, the parasitic capacitance of the BUF802 (CIN) appears in parallel with the 50-Ω resistance resulting in a non-ideal termination across frequency.

The parasitic input capacitance of the BUF802 (CIN) is 2.4 pF. The input impedance of the BUF802 at a particular frequency (XCF) can be calculated using the formula:

Equation 6. XCF = 1/ (2π * f *2.4 pF)

Therefore, the net input impedance seen by the signal will be:

Equation 7. XCF || 50 Ω

For example, at f = 1 GHz, XCF is equal to 66.3 Ω. Therefore, the net input impedance seen by the signal is 66.3 Ω || 50 Ω = 28.5 Ω.

The addition of RS (to reduce S21 peaking), and, the addition of a series termination inductor (LN) (see Figure 1-10 ) results in a net input impedance as shown in Equation 8.

Equation 8. Net input impedance = (50 Ω + XL) || (RS + XCF)

Where XL = 2π * f * LN

With f = 1 GHz, RS = 30 Ω, LN = 6.8 nH, CIN = 2.4 pF and using Equation 8.

Equation 9. Input impedance = (50 Ω + 42.7 Ω) || (30 Ω + 66.3 Ω) ≈ 48 Ω.

While RS can be increased to bring the input impedance to an exact 50 Ω, we are limited by the maximum RS value as discussed in Table 1-1. Figure 1-11, shows S11 vs frequency for different values of RS.

Figure 1-11 S11 with Varying RS

Additional Information