SCLS423G June   1998  – July 2014 SN74AHC594

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Handling Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCC = 3.3 V ± 0.3 V
    7. 6.7  Timing Requirements, VCC = 5 V ± 0.5 V
    8. 6.8  Switching Characteristics, VCC = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics, VCC = 5 V ± 0.5 V
    10. 6.10 Noise Characteristics
    11. 6.11 Operating Characteristics
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|16
  • PW|16
  • NS|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Operating Range 2-V to 5.5-V VCC
  • 8-Bit Serial-In, Parallel-Out Shift Registers with Storage
  • Independent Direct Overriding Clears on Shift and Storage Registers
  • Independent Clocks for Shift and Storage Registers
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • Network Switches
  • Power Infrastructures
  • PCs and Notebooks
  • LED Displays
  • Servers

3 Description

The SNx4AHC594 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks and direct overriding clear (SRCLR, RCLR) inputs are provided on the shift and storage registers. A serial (QH′) output is provided for cascading purposes.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SNx4AHC594 SOIC (16) 9.90 mm × 3.91 mm
SSOP (16) 6.20 mm × 5.30 mm
PDIP (16) 19.30 mm × 6.35 mm
SOP (16) 12.60 mm × 5.30 mm
TSSOP (16) 5.00 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

logic_cls423.gif