SCAS582Q November   1996  – October 2014 SN74LVCHR16245A

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGG|48
  • DL|48
  • DGV|48
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Member of the Texas Instruments
    Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.8 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Signal Operation on
    All Ports (5-V Input/Output Voltage
    With 3.3-V VCC)
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup or Pulldown Resistors
  • All Outputs Have Equivalent 26-Ω Series Resistors, So No External Resistors Are Required
  • Ioff Supports Live Insertion, Partial Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 250 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model

2 Applications

  • Telecom Infrastructures
  • Industrial Transport
  • Wireless Infrastructures
  • Servers
  • Tests and Measurements

Description

This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVCHR16245A device is designed for asynchronous communication between data buses. The control-function implementation minimizes external-timing requirements.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVCHR16245A TSSOP (48) 12.50 mm × 6.10 mm
SSOP (48) 15.88 mm × 7.49 mm
TVSOP (48) 9.70 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

3 Simplified Schematic

ld_cas582.gif