SLOS829A February   2013  – July 2015 THS4532

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Related Products
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = 2.7 V
    6. 7.6 Electrical Characteristics: VS = 5 V
    7. 7.7 Typical Characteristics
      1. 7.7.1 Typical Characteristics: VS = 2.7 V
      2. 7.7.2 Typical Characteristics: VS = 5 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Common-Mode Voltage Range
        1. 8.3.1.1 Setting the Output Common-Mode Voltage
      2. 8.3.2 Power Down
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Frequency Response and Output Impedance
      2. 9.1.2  Distortion
      3. 9.1.3  Slew Rate, Transient Response, Settling Time, Overdrive, Output Voltage, and Turnon and Turnoff Time
      4. 9.1.4  Common-Mode and Power Supply Rejection
      5. 9.1.5  VOCM Input
      6. 9.1.6  Balance Error
      7. 9.1.7  Single-Supply Operation
      8. 9.1.8  Low-Power Applications and the Effects of Resistor Values on Bandwidth
      9. 9.1.9  Driving Capacitive Loads
      10. 9.1.10 Audio Performance
      11. 9.1.11 Audio On and Off Pop Performance
    2. 9.2 Typical Applications
      1. 9.2.1 SAR ADC Performance: THS5432 and ADS8321 Combined Performance
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Audio ADC Driver Performance: THS5432 and PCM4204 Combined Performance
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 SAR ADC Performance: THS5432 and ADS7945 Combined Performance
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
        3. 9.2.3.3 Application Curve
    3. 9.3 Systems Examples
      1. 9.3.1 Differential-Input to Differential-Output Amplifier
        1. 9.3.1.1 AC-Coupled, Differential-Input to Differential-Output Design Issues
      2. 9.3.2 Single-Ended to Differential FDA Configuration
        1. 9.3.2.1 Input Impedance
      3. 9.3.3 Single-Ended Input to Differential Output Amplifier
        1. 9.3.3.1 AC-Coupled Signal Path Considerations for Single-Ended Input to Differential Output Conversion
        2. 9.3.3.2 DC-Coupled Input Signal Path Considerations for Single-Ended to Differential Conversion
        3. 9.3.3.3 Resistor Design Equations for the Single-Ended to Differential Configuration of the FDA
      4. 9.3.4 Differential Input to Single-Ended Output Amplifier
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Ultra Low Power:
    • Voltage: 2.5 V to 5.5 V
    • Current: 250 µA
    • Power-Down Mode: 0.5 µA (typ)
  • Fully-Differential Architecture
  • Bandwidth: 36 MHz
  • Slew Rate: 200 V/µs
  • THD: –120 dBc at 1 kHz (1 VRMS, RL= 2 kΩ)
  • Input Voltage Noise: 10 nV/√Hz (f = 1 kHz)
  • High DC Accuracy:
    • VOS: ±100 µV
    • VOS Drift: ±3 µV/˚C (–40°C to +125°C)
    • AOL: 114 dB
  • Rail-to-Rail Output (RRO)
  • Negative Rail Input (NRI)
  • Output Common-Mode Control

2 Applications

  • Low-Power SAR, ΔΣ ADC Driver
  • Low Power, High Performance:
    • Differential to Differential Amplifier
    • Single-Ended to Differential Amplifier
  • Low-Power, Wide-Bandwidth Differential Driver
  • Low-Power, Wide-Bandwidth Differential Signal Conditioning
  • High Channel Count and Power Dense Systems

3 Description

The THS4532 is a low-power, fully-differential amplifier with input common-mode range below the negative rail and rail-to-rail output. The device is designed for low-power data acquisition systems and high density applications where power consumption and dissipation is critical.

The device features accurate output common-mode control that allows for dc coupling when driving analog-to-digital converters (ADCs). This control, coupled with the input common-mode range below the negative rail and rail-to-rail output, allows for easy interface from single-ended ground-referenced signal sources to successive-approximation registers (SARs), and delta-sigma (ΔΣ) ADCs using only single-supply 2.5-V to 5-V power. The THS4532 is also a valuable tool for general-purpose, low-power differential signal conditioning applications.

The device is characterized for operation over the extended industrial temperature range from –40°C to 125°C. The following package options are available:

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
THS4532 TSSOP 5.00 mm x 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

1-kHz FFT Plot on Audio Analyzer

THS4532 G071_FFT_1kHz.png