SCDS356C November   2014  – March 2019 TS3DDR4000

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Static Electrical Characteristics
    6. 6.6 Dynamic Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Non-Volatile Dual In-line Memory Module (NVDIMM) application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 Load Isolation Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Wide VDD Range: 2.375 V – 3.6 V
  • High Bandwidth: 5.6 GHz Typical (single-ended); 6.0 GHz Typical (differential)
  • Low Switch On-Resistance (RON): 8 Ω Typical
  • Low Bit-to-Bit Skew: 3ps Typical; 6ps Max across All Channels
  • Low Crosstalk: –34 dB Typical at 1067 MHz
  • Low Operating Current: 40 µA Typical
  • Low-Power Mode with Low Current Consumption: 2 µA Typical
  • IOFF Protection Prevents Current Leakage in Powered Down State (VDD = 0 V)
  • Supports POD_12, SSTL_12, SSTL_15 and SSTL_18 Signaling
  • ESD Performance:
    • 3-kV Human Body Model (A114B, Class II)
    • 1-kV Charged Device Model (C101)
  • 8 mm x 3 mm 48-balls 0.65-mm Pitch ZBA Package