Product details

Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 11 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 24 Sample rate (max) (ksps) 1365 Number of input channels 4 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Multichannel configuration Simultaneous Sampling Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 11 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 110 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RSH) 56 49 mm² (7 mm × 7 mm)
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V
  • Simultaneously measure four or eight channels
  • Wideband filter mode: up to 512kSPS
  • Low-latency filter mode: up to 1365kSPS
  • Power-scalable speed modes:
    • Max speed: 512kSPS
      • 83mW (ADS127L14)
      • 165mW (ADS127L18)
    • High speed: 400kSPS
      • 64mW (ADS127L14)
      • 128mW (ADS127L18)
    • Mid speed: 200kSPS
      • 37mW (ADS127L14)
      • 74mW (ADS127L18)
    • Low speed: 50kSPS
      • 12mW (ADS127L14)
      • 24mW (ADS127L18)
  • AC performance with DC precision: (High-Speed Mode)
    • Dynamic range at 200kSPS: 112dB (typical)
    • THD: –118dB (typical)
    • INL: 1ppm of FSR (typical)
    • Offset drift: 10nV/°C (typical)
    • Gain drift: 0.5ppm/°C (typical)
  • Precharge buffered signal inputs
  • Programmable by pin setting or SPI
  • Frame-sync port for output data
  • Internal or external clock operation
  • Analog supply voltage: 2.85V to 5.5V

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).

The ADS127L14 (quad) and ADS127L18 (octal) are 24-bit, delta-sigma (ΔΣ), analog-to-digital converters (ADCs) based on the single-channel ADS127L11. The devices provide simultaneous sampling of four or eight channels with data rates up to 512kSPS (wideband filter mode) and 1365kSPS (low-latency filter mode).

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Technical documentation

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* Data sheet ADS127L1x 512kSPS, Quad and Octal, Simultaneous-Sampling, 24-Bit ADCs datasheet (Rev. B) PDF | HTML Nov 22, 2024
Application note A Simple, Java-Based CRC Calculator PDF | HTML Mar 4, 2026
Application note Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML Dec 29, 2025
Application note Achieve High SNR with the PGA855, Fully Differential Programmable-Gain Amplifier PDF | HTML Mar 21, 2024
Design guide Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML Nov 28, 2022

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS127L18EVM-PDK — ADS127L18 evaluation module

The ADS127L18EVM is a platform for evaluating the performance of the ADS127L18, an eight channel, 24-bit simultaneous-sampling delta-sigma analog-to-digital converter (ADC). The evaluation kit includes the ADS127L18EVM board and the precision host interface (PHI) controller board that enables the (...)
User guide: PDF | HTML
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Support software

ADS127L18-FPGA-EXAMPLE-CODE — ADS127L18 example FPGA code

Expedite your digital design using this example Verilog/RTL code for the ADS127L18 product family
Supported products & hardware
Support software

ADS127L18-MSPM0-EXAMPLE-CODE — ADS127L18 + MSPM0 example code

Expedite your design using this example C code for interfacing MSPM0 and the ADS127L18 product family.
Supported products & hardware
Simulation model

ADS117L14, ADS117L18, ADS127L14, ADS127L18 IBIS Model

SBAM524.ZIP (88 KB) - IBIS model
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Calculation tool

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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VQFN (RSH) 56 Ultra Librarian

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