Product details

Sample rate (max) (Msps) 210 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 700 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 628 Architecture Pipeline SNR (dB) 73.4 ENOB (Bits) 11.4 SFDR (dB) 92 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 210 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS, Parallel LVDS Analog input BW (MHz) 700 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 628 Architecture Pipeline SNR (dB) 73.4 ENOB (Bits) 11.4 SFDR (dB) 92 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGZ) 48 49 mm² 7 x 7
  • Maximum Sample Rate: 250 MSPS
  • 14-Bit Resolution — ADS614X
  • 12-Bit Resolution — ADS612X
  • 687 mW Total Power Dissipation at 250 MSPS
  • Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
  • Programmable Fine Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Input Clock Amplitude Down to 400 mVPP Differential
  • Internal and External Reference Support
  • 48-QFN Package (7mm × 7mm)
  • Pin Compatible with ADS5547 Family
  • APPLICATIONS
    • Multicarrier, Wide Band-Width Communications
    • Wireless Multi-carrier Communications Infrastructure
    • Software Defined Radio
    • Power Amplifier Linearization
    • 802.16d/e
    • Test and Measurement Instrumentation
    • High Definition Video
    • Medical Imaging
    • Radar Systems
  • Maximum Sample Rate: 250 MSPS
  • 14-Bit Resolution — ADS614X
  • 12-Bit Resolution — ADS612X
  • 687 mW Total Power Dissipation at 250 MSPS
  • Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
  • Programmable Fine Gain up to 6dB for SNR/SFDR Trade-Off
  • DC Offset Correction
  • Supports Input Clock Amplitude Down to 400 mVPP Differential
  • Internal and External Reference Support
  • 48-QFN Package (7mm × 7mm)
  • Pin Compatible with ADS5547 Family
  • APPLICATIONS
    • Multicarrier, Wide Band-Width Communications
    • Wireless Multi-carrier Communications Infrastructure
    • Software Defined Radio
    • Power Amplifier Linearization
    • 802.16d/e
    • Test and Measurement Instrumentation
    • High Definition Video
    • Medical Imaging
    • Radar Systems

ADS614X (ADS612X) is a family of 14-bit (12-bit) A/D converters with sampling rates up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 48 QFN package. This makes it well-suited for multicarrier, wide band-width communications applications.

ADS614X/2X has fine gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (-40°C to 85°C).

ADS614X (ADS612X) is a family of 14-bit (12-bit) A/D converters with sampling rates up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 48 QFN package. This makes it well-suited for multicarrier, wide band-width communications applications.

ADS614X/2X has fine gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.

It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (-40°C to 85°C).

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet 14/12 Bit, 250/210 MSPS ADC with DDR LVDS and Parallel CMOS Outputs datasheet (Rev. B) 10 Oct 2008
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Analog Design Journal Power-supply design for high-speed ADCs (Rev. A) 18 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Band-Pass Filter Design Techniques for High-Speed ADCs 27 Feb 2012
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 Sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
Application note QFN Layout Guidelines 28 Jul 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

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ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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Calculation tool

JITTER-SNR-CALC Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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Design tool

SBAC119 TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
VQFN (RGZ) 48 Ultra Librarian

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