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The ADS8509 is a complete 16-bit sampling analog-to-digital (A/D) converter using state-of-the-art CMOS structures. It contains a complete 16-bit, capacitor-based, successive approximation register (SAR) A/D converter with sample-and-hold, reference, clock, and a serial data interface. Data can be output using the internal clock or can be synchronized to an external data clock. The ADS8509 also provides an output synchronization pulse for ease of use with standard DSP processors.
The ADS8509 is specified at a 250-kHz sampling rate over the full temperature range. Precision resistors provide various input ranges including ±10 V and 0 V to 5 V, while the innovative design allows operation from a single +5-V supply with power dissipation under 100 mW.
The ADS8509 is available in 20-pin SO and 28-pin SSOP packages, both fully specified for operation over the industrial –40°C to 85°C temperature range.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | 16-Bit 250-KSPS Serial CMOS Sampling Analog-to-Digital Converter datasheet (Rev. C) | Apr 14, 2010 | |
| White paper | Voltage-reference impact on total harmonic distortion | Aug 1, 2016 | ||
| E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | May 21, 2015 | ||
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 2 | Mar 17, 2011 | ||
| Application note | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | Nov 10, 2010 | ||
| Application note | Upgrading From ADS7808/09 to ADS8508/09 Devices | Jun 12, 2007 |
For additional terms or required resources, click any title below to view the detail page where available.
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (DW) | 20 | Ultra Librarian |
| SSOP (DB) | 28 | Ultra Librarian |
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