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CD74HCT00

ACTIVE

4-ch, 2-input, 4.5-V to 5.5-V NAND gates with TTL-compatible CMOS inputs

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Data sheet

CD74HCT00

ACTIVE
Data sheet Order now

Product details

Technology family HCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type TTL-Compatible CMOS Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 25 Rating Catalog Operating temperature range (°C) -55 to 125
Technology family HCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type TTL-Compatible CMOS Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 25 Rating Catalog Operating temperature range (°C) -55 to 125
PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm)
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • Buffered inputs
  • 4.5 V to 5.5 V operation
  • Wide operating temperature range: –55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • LSTTL input logic compatible
    • VIL(max) = 0.8 V, VIH(min) = 2 V
  • CMOS input logic compatible
    • II ≤ 1 µA at VOL, VOH
  • Buffered inputs
  • 4.5 V to 5.5 V operation
  • Wide operating temperature range: –55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs

This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y = A ● B in positive logic.

This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y = A ● B in positive logic.
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CD74ACT00 ACTIVE 4-ch, 2-input, 4.5-V to 5.5-V NAND gates with TTL-compatible CMOS inputs Voltage range 4.5V to 5.5V, average propagation delay 8ns, average drive strength 24mA

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* Data sheet CDx4HCT00 High Speed CMOS Logic Quad 2-Input NAND Gate datasheet Jan 15, 2021

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