The HC640 and HCT640 silicon-gate CMOS three-state bidirectional inverting and non-inverting buffers are intended for two-way asynchronous communication between data buses. They have high drive current outputs which enable high-speed operation when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuits, and have speeds comparable to low power Schottky TTL circuits. They can drive 15 LSTTL loads. The HC640 and HCT640 are inverting buffers.
The direction of data flow (A to B, B to A) is controlled by the DIR input.
Outputs are enabled by a low on the Output Enable input (OE\); a high OE\ puts these devices in the high impedance mode.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)|
||HCT||4.5||5.5||8||5||25||0.08||28||6||-6||Catalog||-55 to 125|
|CD54HCT640||Samples not available||HCT||4.5||5.5||8||5||25||0.08||28||6||-6||Military||-55 to 125|