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CSD22206W

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-8V, P channel NexFET™ power MOSFET, single WLP 1.5 mm x 1.5 mm, 5.7 mOhm, gate ESD protection

Product details

VDS (V) -8 VGS (V) -6 Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 5.7 Rds(on) at VGS=2.5 V (max) (mΩ) 9.1 Id peak (max) (A) -108 Id max cont (A) -5 QG (typ) (nC) 11.2 QGD (typ) (nC) 1.8 QGS (typ) (nC) 2.1 VGSTH typ (typ) (V) -0.7 ID - silicon limited at TC=25°C (A) 5 Logic level Yes Operating temperature range (°C) -55 to 150 Rating Catalog
VDS (V) -8 VGS (V) -6 Configuration Single Rds(on) at VGS=4.5 V (max) (mΩ) 5.7 Rds(on) at VGS=2.5 V (max) (mΩ) 9.1 Id peak (max) (A) -108 Id max cont (A) -5 QG (typ) (nC) 11.2 QGD (typ) (nC) 1.8 QGS (typ) (nC) 2.1 VGSTH typ (typ) (V) -0.7 ID - silicon limited at TC=25°C (A) 5 Logic level Yes Operating temperature range (°C) -55 to 150 Rating Catalog
DSBGA (YZF) 9 3.0625 mm² 1.75 x 1.75
  • Ultra-Low Resistance
  • Small Footprint 1.5 mm × 1.5 mm
  • Lead Free
  • Gate ESD Protection
  • RoHS Compliant
  • Halogen Free
  • Gate-Source Voltage Clamp
  • Ultra-Low Resistance
  • Small Footprint 1.5 mm × 1.5 mm
  • Lead Free
  • Gate ESD Protection
  • RoHS Compliant
  • Halogen Free
  • Gate-Source Voltage Clamp

This –8-V, 4.7-mΩ, 1.5-mm × 1.5-mm device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Low on resistance coupled with the small footprint and low profile make the device ideal for battery operated space constrained applications.

This –8-V, 4.7-mΩ, 1.5-mm × 1.5-mm device is designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. Low on resistance coupled with the small footprint and low profile make the device ideal for battery operated space constrained applications.

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Technical documentation

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Type Title Date
* Data sheet CSD22206W –8-V P-Channel NexFET Power MOSFET datasheet PDF | HTML 17 May 2017
Application note MOSFET Support and Training Tools (Rev. B) PDF | HTML 29 Mar 2023
Application note Using MOSFET Safe Operating Area Curves in Your Design PDF | HTML 13 Mar 2023
Application note Solving Assembly Issues with Chip Scale Power MOSFETs PDF | HTML 21 Oct 2022
Application note Tips for Successfully Paralleling Power MOSFETs PDF | HTML 31 May 2022
More literature WCSP Handling Guide 07 Nov 2019
Application note AN-1112 DSBGA Wafer Level Chip Scale Package (Rev. AI) 14 Jun 2019
Technical article Understanding the benefits of “lead-free” power MOSFETs 08 Feb 2019
Application note Semiconductor and IC Package Thermal Metrics (Rev. C) PDF | HTML 19 Apr 2016
Technical article When to use load switches in place of discrete MOSFETs 03 Feb 2016
Technical article 48V systems: Driving power MOSFETs efficiently and robustly 08 Oct 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

CSD22206W TINA-TI Reference Design

SLPM316.TSC (1195 KB) - TINA-TI Reference Design
Simulation model

CSD22206W TINA-TI Spice Model

SLPM317.ZIP (8 KB) - TINA-TI Spice Model
Simulation model

CSD22206W Unencrypted PSpice Model (Rev. B)

SLPM287B.ZIP (4 KB) - PSpice Model
Package Pins Download
DSBGA (YZF) 9 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
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  • Qualification summary
  • Ongoing reliability monitoring

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