The LP5899 SPI-compatible connectivity enables the LP589x device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the LP589x device family. Jitter can be added to the continuous clock for EMI enhancement. The transmitted data is aligned to the continuous clock to maintain the timing requirements of the CCSI interface.
LP5899 incorporates reporting of faults in both the LP589x daisy chain and LP5899 internal. Data transmission of register and VSYNC commands to the LP589x daisy chain is CRC protected by LP5899. In addition, the data line is guarded by LP5899 for stuck-at faults.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | LP5899 SPI-Compatible Connectivity for LP589x Device Family datasheet (Rev. A) | PDF | HTML | Oct 31, 2025 |
| Certificate | LP5899DYYEVM EU Declaration of Conformity (DoC) | Oct 22, 2024 | ||
| User guide | LP589x(-Q1)/TLC698x Sample Code User's Guide (Rev. A) | PDF | HTML | Sep 6, 2024 |
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The LP5899 SPI-compatible connectivity evaluation module enables the LP589x device family to be controlled using a standard SPI controller. The device features an internal oscillator to generate the continuous clock required by the LP589x device family. Jitter can be added to the continuous clock (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOT-23-THN (DYY) | 14 | Ultra Librarian |
| WSON (DRR) | 12 | Ultra Librarian |
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