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Product details

Parameters

Technology Family TTL Applications GTL Bits (#) 8 IOH (Max) (mA) -15 IOL (Max) (mA) 48 open-in-new Find other GTL, TTL, BTL & ECL transceivers & translators

Package | Pins | Size

SOIC (DW) 24 160 mm² 15.5 x 10.3 open-in-new Find other GTL, TTL, BTL & ECL transceivers & translators
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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet Octal TTL-to-ECL Translators With Output Enable datasheet (Rev. A) Dec. 01, 1988
Selection guides Voltage translation buying guide Jun. 13, 2019

Design & development

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Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

CAD/CAE symbols

Package Pins Download
SOIC (DW) 24 View options

Ordering & quality

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