Product details

Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -24 Input type CMOS Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Very high speed (tpd 5-10ns) Technology family ABT Rating Military Operating temperature range (°C) -55 to 125
Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -24 Input type CMOS Output type TTL Features Over-voltage tolerant inputs, Partial power down (Ioff), Power up 3-state, Very high speed (tpd 5-10ns) Technology family ABT Rating Military Operating temperature range (°C) -55 to 125
LCCC (FK) 20 79.0321 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm) CFP (W) 20 90.5828 mm² (— mm × — mm)
  • Typical VOLP (Output Ground Bounce)
       <1 V at VCC = 5 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • High-Drive Outputs (–32-mA IOH, 64-mA IOL)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

  • Typical VOLP (Output Ground Bounce)
       <1 V at VCC = 5 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • High-Drive Outputs (–32-mA IOH, 64-mA IOL)
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

These octal bus transceivers are designed for asynchronous communication between data buses. The devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the device so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN54ABT245A, SN74ABT245B datasheet (Rev. L) Apr 6, 2005
* SMD SN54ABT245A SMD 5962-92148 Jun 21, 2016

Design & development

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Package Pins CAD symbols, footprints & 3D models
LCCC (FK) 20 Ultra Librarian
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian

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