Product details

Technology Family AHC Number of channels (#) 4 Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Inputs per channel 2 IOL (Max) (mA) 50 IOH (Max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Military
Technology Family AHC Number of channels (#) 4 Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Inputs per channel 2 IOL (Max) (mA) 50 IOH (Max) (mA) -50 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Military
CDIP (J) 14 130 mm² 19.94 x 6.73 CFP (W) 14 55 mm² 9.2 x 6.39 LCCC (FK) 20 79 mm² 8.89 x 8.89
  • Operating Range 2-V to 5.5-V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • Operating Range 2-V to 5.5-V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

The ’AHC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = AB or Y = A + B in positive logic.

The ’AHC02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = AB or Y = A + B in positive logic.

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Technical documentation

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Type Title Date
* Data sheet SN54AHC02, SN74AHC02 datasheet (Rev. L) 23 Jun 2013
* SMD SN54AHC02 SMD 5962-97528 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
More literature Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

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CDIP (J) 14 View options
CFP (W) 14 View options
LCCC (FK) 20 View options

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