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Product details

Parameters

Technology Family HC VCC (Min) (V) 2 VCC (Max) (V) 6 Channels (#) 6 IOL (Max) (mA) 6 IOH (Max) (mA) 0 ICC (Max) (uA) 20 Input type Standard CMOS Output type Open-Drain Features Balanced outputs, Very high speed (tpd 5-10ns) Data rate (Mbps) 40 Rating Military open-in-new Find other Inverting buffer/driver

Package | Pins | Size

CDIP (J) 14 LCCC (FK) 20 open-in-new Find other Inverting buffer/driver

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs can Drive up to 10 LSTTL Loads
  • Low-Power Consumption, 20-µA Maximum ICC
  • Typical tpd = 8 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1-µA Maximum
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Description

The SNx4HC05 devices contain six independent inverters. They perform the Boolean function Y = A in positive logic. The open-drain outputs require pullup resistors to perform correctly. They may be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.

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Technical documentation

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Type Title Date
* Datasheet SNx4HC05 Hex Inverters With Open-Drain Outputs datasheet (Rev. E) Mar. 25, 2015
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
SMD SN54HC05 SMD 5962-88718 Jun. 21, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

CAD/CAE symbols

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CDIP (J) 14 View options
LCCC (FK) 20 View options

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