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CDIP (J) 16 135 mm² 19.65 x 6.92
  • High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Up to 15 LSTTL Loads
  • Choice of True or Inverting Outputs
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Dependable Texas Instruments Quality and Reliability
    'HC365, HC367 - True Outputs
    'HC366, HC368 - Inverting Outputs
  • High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Up to 15 LSTTL Loads
  • Choice of True or Inverting Outputs
  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Dependable Texas Instruments Quality and Reliability
    'HC365, HC367 - True Outputs
    'HC366, HC368 - Inverting Outputs

These Hex buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receviers and transmitters. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical G (active-low control) inputs.

The SN54HC' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC' family is characterized for operation from -40°C to 85°C.

These Hex buffers and line drivers are designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receviers and transmitters. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical G (active-low control) inputs.

The SN54HC' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC' family is characterized for operation from -40°C to 85°C.

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Technical documentation

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Type Title Date
* Data sheet Hex Bus Drivers With 3-State Outputs datasheet 01 Jun 1989
* SMD SN54HC366 SMD 5962-86828 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

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CDIP (J) 16 View options

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