SN54HC4002

ACTIVE

Dual 4-Input Positive-NOR Gates

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Product details

Parameters

Technology Family HC VCC (Min) (V) 2 VCC (Max) (V) 6 Rating Military Operating temperature range (C) -55 to 125 open-in-new Find other NOR gate

Package | Pins | Size

CDIP (J) 14 LCCC (FK) 20 open-in-new Find other NOR gate

Features

  • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip carriers, and Standard Plastic and Ceramic 300-mil DIPs
  • Dependable Texas Instruments Quality and Reliability
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Description

These devices contain two independent 4-input positive NOR gates. They perform the Boolean functions: Y = (A + B + C + D)\ or Y = A\ \x95 B\ \x95 C\ \x95 D\ in positive logic.

The SN54HC4002 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC4002 is characterized for operation from -40°c to 85°C.

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Technical documentation

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Type Title Date
* Datasheet Dual 4-Input Positive-NOR Gates datasheet Sep. 01, 1987
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
SMD SN54HC4002 SMD 84044012A Jun. 21, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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CAD/CAE symbols

Package Pins Download
CDIP (J) 14 View options
LCCC (FK) 20 View options

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