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SN54HCT373

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Octal D-type Transparent Latches With 3-State Outputs

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Data sheet

SN54HCT373

ACTIVE
Data sheet Order now

Product details

Number of channels 8 Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 25 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 25 IOL (max) (mA) 6 IOH (max) (mA) -6 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm² 24.2 x 6.92 CFP (W) 20 90.5828 mm² 13.09 x 6.92 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Operating voltage range of 4.5 V to 5.5 V
  • High-current 3-state true outputs can drive up to 15 LSTTL loads
  • Low power consumption, 80-µA max ICC
  • Typical tpd =21 ns
  • ±6-mA output drive at 5 V
  • Low input current of 1 µA max
  • Inputs are TTL-voltage compatible
  • Eight high-current latches in a single package
  • Full parallel access for loading
  • Operating voltage range of 4.5 V to 5.5 V
  • High-current 3-state true outputs can drive up to 15 LSTTL loads
  • Low power consumption, 80-µA max ICC
  • Typical tpd =21 ns
  • ±6-mA output drive at 5 V
  • Low input current of 1 µA max
  • Inputs are TTL-voltage compatible
  • Eight high-current latches in a single package
  • Full parallel access for loading
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Technical documentation

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Type Title Date
* Data sheet SNx4HCT373 Octal Transparent D-Type Latches With 3-State Outputs datasheet (Rev. G) PDF | HTML 13 Jul 2022
* SMD SN54HCT373 SMD 5962-86867 21 Jun 2016
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Package Pins CAD symbols, footprints & 3D models
CDIP (J) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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