SN54LVC02A

ACTIVE

Military 4-ch, 2-input, 2-V to 3.6-V NOR gates

Product details

Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Output type Push-Pull Input type Standard CMOS Features Over-voltage tolerant Inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
CFP (W) 14 58.023 mm² (— mm × — mm) CDIP (J) 14 130.4652 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm)
  • Operate from 1.65V to 3.6V
  • Specified from –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.4ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • Operate from 1.65V to 3.6V
  • Specified from –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.4ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The device performs the Boolean function Y = A + B or Y = A ⋅ B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The device performs the Boolean function Y = A + B or Y = A ⋅ B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SNx4LVC02A Quadruple 2-Input Positive-NOR Gates datasheet (Rev. T) PDF | HTML Dec 19, 2024
* SMD SN54LVC02A SMD 5962-97604 Jun 21, 2016

Design & development

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Package Pins CAD symbols, footprints & 3D models
CFP (W) 14 Ultra Librarian
CDIP (J) 14 Ultra Librarian
LCCC (FK) 20 Ultra Librarian

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