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SN54LVC08A

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Military, 4-ch 2-input 1.65-V to 3.6-V AND gate

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Data sheet

SN54LVC08A

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
CFP (W) 14 58.023 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm) CDIP (J) 14 130.4652 mm² (— mm × — mm)
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
    • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • SN74LVC08A operates from 1.65V to 3.6V
  • SN54LVC08A operates from 2.0V to 3.6V
  • SNx4LVC08A specified from –40°C to +85°C and –40°C to +125°C
  • SN54LVC08A specified from –55°C to +125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V Human-Body Model (A114-A)
    • 1000V Charged-Device Model (C101)
    • On products compliant to MIL-PRF-38535, All parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • SN74LVC08A operates from 1.65V to 3.6V
  • SN54LVC08A operates from 2.0V to 3.6V
  • SNx4LVC08A specified from –40°C to +85°C and –40°C to +125°C
  • SN54LVC08A specified from –55°C to +125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C

The SN54LVC08A quadruple 2-input positive-AND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC08A quadruple 2-input positive-AND gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC08A devices perform the Boolean function Y = A • B or Y = /A + /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.

The SN54LVC08A quadruple 2-input positive-AND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC08A quadruple 2-input positive-AND gate is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC08A devices perform the Boolean function Y = A • B or Y = /A + /B in positive logic.

Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.
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Top documentation Type Title Format options Date
* Data sheet SNx4LVC08A Quadruple 2-Input Positive-AND Gates datasheet (Rev. W) PDF | HTML Jul 29, 2024
* SMD SN54LVC08A SMD 5962-97534 Jun 21, 2016

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Package Pins CAD symbols, footprints & 3D models
CFP (W) 14 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
CDIP (J) 14 Ultra Librarian
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