Product details

Technology family LVC Number of channels 8 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family LVC Number of channels 8 IOL (max) (mA) 24 Supply current (max) (µA) 10 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Rating Military Operating temperature range (°C) -55 to 125
LCCC (FK) 20 79.0321 mm² (— mm × — mm) CFP (W) 20 90.5828 mm² (— mm × — mm) CDIP (J) 20 167.464 mm² (— mm × — mm)
  • Operates from 1.65V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 5.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Support mixed-mode signal operation on all ports (5V input/output voltage with 3.3V VCC)
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted, on all other products, production processing does not necessarily include testing of all parameters
  • Operates from 1.65V to 3.6V
  • Inputs accept voltages to 5.5V
  • Maximum tpd of 5.1ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Support mixed-mode signal operation on all ports (5V input/output voltage with 3.3V VCC)
  • Ioff supports live insertion, partial-power-down mode, and back-drive protection
  • Latch-up performance exceeds 100mA per JESD 78
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted, on all other products, production processing does not necessarily include testing of all parameters

The SNx4LVC541A contains eight non-inverting buffers with 3-state outputs. The active low output enable pins (OE1 and OE2) control all eight channels, and are configured so that both must be low for the outputs to be active.

The SNx4LVC541A contains eight non-inverting buffers with 3-state outputs. The active low output enable pins (OE1 and OE2) control all eight channels, and are configured so that both must be low for the outputs to be active.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SNx4LVC541A Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. O) PDF | HTML Jun 25, 2026
* SMD SN54LVC541A SMD 5962-97595 Jun 21, 2016

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Package Pins CAD symbols, footprints & 3D models
LCCC (FK) 20 Ultra Librarian
CFP (W) 20 Ultra Librarian
CDIP (J) 20 Ultra Librarian

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