Product details

Technology Family AHC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 1 Inputs per channel 2 IOL (Max) (mA) 8 IOH (Max) (mA) -8 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Catalog Operating temperature range (C) -40 to 125, -40 to 85
Technology Family AHC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 1 Inputs per channel 2 IOL (Max) (mA) 8 IOH (Max) (mA) -8 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (Max) (Mbps) 110 Rating Catalog Operating temperature range (C) -40 to 125, -40 to 85
SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 5 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Low Power Consumption, 10-µA Max ICC
  • ±8-mA Output Drive at 5 V
  • Schmitt-Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • Operating Range of 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Low Power Consumption, 10-µA Max ICC
  • ±8-mA Output Drive at 5 V
  • Schmitt-Trigger Action at All Inputs Makes the Circuit Tolerant for Slower Input Rise and Fall Time
  • Latch-Up Performance Exceeds 250 mA Per JESD 17

The SN74AHC1G32 device is a single 2-input positive-OR gate. The device performs the Boolean function Y = A + B or Y = A\ + B\ in positive logic.

The SN74AHC1G32 device is a single 2-input positive-OR gate. The device performs the Boolean function Y = A + B or Y = A\ + B\ in positive logic.

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Technical documentation

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Type Title Date
* Data sheet SN74AHC1G32 Single 2-Input Positive-OR Gate datasheet (Rev. P) PDF | HTML 02 Feb 2017
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
More literature Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74AHC1G32 Behavioral SPICE Model

SCLM268.ZIP (7 KB) - PSpice Model
Simulation model

SN74AHC1G32 IBIS Model

SCLM006.ZIP (13 KB) - IBIS Model
Simulation model

SN74AHC1G32H IBIS Model

SCLM040.ZIP (6 KB) - IBIS Model
Simulation model

SN74AHC1G32H IBIS Model

SCLM041.ZIP (5 KB) - IBIS Model
Simulation model

SN74AHC1G32H IBIS Model

SCLM042.ZIP (6 KB) - IBIS Model
Simulation model

SN74AHC1G32H IBIS Model

SCLM043.ZIP (5 KB) - IBIS Model
Reference designs

TIDEP0056 — Thermal Printing with the PRU-ICSS on the BeagleBone Black Reference Design

The Programmable Realtime Unit – Industrial Communications Sub-System (PRU-ICSS) is a versatile component of the AM335x SoC that enables real-time, deterministic, fast GPIO control, even when running a non-deterministic operating system. This reference design provides a concrete use case and (...)
Design guide: PDF
Schematic: PDF
Reference designs

PMP10711 — Simple 6-Channel Power Supply Sequencing Reference Design for Multi-rail Outputs

PMP10711 is a 6-channel power supply sequencer that utilizes two LM3880 3-channel sequencer ICs. The design uses an external AND gate and OR gate to power up and power down all 6 channels in sequential fashion. This is useful in cases when up to 6 power rails need to be sequenced during power up (...)
Test report: PDF
Schematic: PDF
Package Pins Download
SC70 (DCK) 5 View options
SOT-23 (DBV) 5 View options
SOT-5X3 (DRL) 5 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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